Digital reliability monitor having autonomic repair and notification capability

• US 7,287,177 B2
• Filed: 12/04/2003
• Issued: 10/23/2007
• Est. Priority Date: 12/04/2003
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: International Business Machines Corporation
• Inventors: Bonaccio, Anthony R., Ventrone, Sebastian T., Tonti, William R., LeStrange, Michael
• Primary Examiner(s): Lee; Thomas
• Assistant Examiner(s): Bae; Ji H
• Application Number:
  US10/729,751
• Publication Number:
  US 20050125707A1
• Time in Patent Office: 1,419 Days
• Field of Search: 713/502, 377/16
• US Class Current: 713/502
• CPC Class Codes: G06F 1/04 Generating or distributing clock signals or signals derived directly therefrom

Abstract

An integrated circuit, including: a pulse generator adapted to generate a pulsed signal; a cycle counter adapted to count cycles of the pulsed signal; one or more repairable circuit elements; and a repair processor adapted to repair a repairable circuit element when the cycle counter reaches a pre-determined cycle count.

Claims

1. An integrated circuit, comprising:

a pulse generator coupled to a cycle counter;

one or more repairable circuit elements;

a repair processor coupled to said cycle counter and adapted to repair a repairable circuit element of said one or more repairable circuit elements before both (i) said repairable circuit element fails and (ii) when said cycle counter reaches a pre-determined cycle count of pulses generated by said pulse generator; and

a memory circuit adapted to store a cycle count of a number of cycles counted since an initial power up and to resume counting from said stored cycle count after a power down/power up cycle of said integrated circuit.

2. The integrated circuit of claim 1, wherein said repair processor is adapted to permanently disable said repairable circuit element and replace said repairable circuit element with a redundant circuit element having the same function as said repairable circuit element.

3. The integrated circuit of claim 1, wherein said pulses comprise a clock signal and said repairable circuit element is responsive to said clock signal.

4. The integrated circuit of claim 1, wherein:

said cycle counter is adapted to generate a trigger signal when said predetermined cycle count is reached; and

said repair processor is adapted to receive said trigger signal and affect a repair of said repairable circuit element when said trigger signal is received.

5. The integrated circuit of claim 4, wherein said trigger signal comprises a subset of a set of bits encoding a current cycle count of said cycle counter.

6. The integrated circuit of claim 1, wherein said repairable circuit element is selected from the group consisting of a digital circuit, an analog circuit, a memory circuit, a latch, a logic gate, a group of logic gates, an individual device, a transistor, a diode, a resistor, capacitor, an inductor and a wire.

7. The integrated circuit of claim 1, wherein selected gates of a field programmable gate array are used to implement said repairable circuit element, and said repair processor is adapted to program a replacement of said selected gates of said field programmable gate array with previously unused gates of said field programmable gate array.

8. The integrated circuit of claim 1, wherein said repair processor is adapted to perform multiple repairs by repairing previously repaired repairable circuit elements.

9. The integrated circuit of claim 1, wherein:

said cycle counter is adapted to generate a signal encoding what fraction of said predetermined cycle count is reached; and

said repair processor is adapted to receive said signal and affect a repair of said repairable circuit element when said fraction of said predetermined cycle count is 1.

10. The integrated circuit of claim 1, further including:

said cycle counter generating a signal encoding what fraction of said predetermined cycle count is reached; and

said repair processor receiving said signal and repairing said repairable circuit element when said signal encodes a fraction of 1.

11. An integrated circuit, comprising:

a pulse generator coupled to a cycle counter;

one or more repairable circuit elements;

a repair processor coupled to said cycle counter and adapted to repair a repairable circuit element of said one or more repairable circuit elements before both (i) said repairable circuit element fails and (ii) when said cycle counter reaches a pre-determined cycle count of pulses generated by said pulse generator;

a redundant cycle counter; and

wherein said repair processor is adapted to replace said cycle counter with said redundant cycle counter when said cycle counter reaches a fixed cycle count.

12. The integrated circuit of claim 11, wherein said repair processor is adapted to permanently disable said repairable circuit element and replace said repairable circuit element with a redundant circuit element having the same function as said repairable circuit element.

13. The integrated circuit of claim 11, wherein said pulses comprise a clock signal and said repairable circuit element is responsive to said clock signal.

14. The integrated circuit of claim 11, wherein:

said cycle counter is adapted to generate a trigger signal when said predetermined cycle count is reached; and

said repair processor is adapted to receive said trigger signal and affect a repair of said repairable circuit element when said trigger signal is received.

15. The integrated circuit of claim 14, wherein said trigger signal comprises a subset of a set of bits encoding a current cycle count of said cycle counter.

16. The integrated circuit of claim 11, wherein said repairable circuit element is selected from the group consisting of a digital circuit, an analog circuit, a memory circuit, a latch, a logic gate, a group of logic gates, an individual device, a transistor, a diode, a resistor, capacitor, an inductor and a wire.

17. The integrated circuit of claim 11, wherein selected gates of a field programmable gate array are used to implement said repairable circuit element, and said repair processor is adapted to program a replacement of said selected gates of said field programmable gate array with previously unused gates of said field programmable gate array.

18. The integrated circuit of claim 11, wherein said repair processor is adapted to perform multiple repairs by repairing previously repaired repairable circuit elements.

19. The integrated circuit of claim 11, wherein:

said cycle counter is adapted to generate a signal encoding what fraction of said predetermined cycle count is reached; and

said repair processor is adapted to receive said signal and affect a repair of said repairable circuit element when said fraction of said predetermined cycle count is 1.

20. The integrated circuit of claim 11, further including:

said cycle counter generating a signal encoding what fraction of said predetermined cycle count is reached; and

said repair processor receiving said signal and repairing said repairable circuit element when said signal encodes a fraction of 1.

21. A method of preemptively repairing an integrated circuit, comprising:

(a) providing a pulse generator for generating a pulsed signal;

(b) providing a cycle counter for counting cycles of said pulsed signal;

(c) providing one or more repairable circuit elements;

(d) providing a repair processor for repairing a repairable circuit element of said one or more repairable circuit elements when said cycle counter reaches a pre-determined cycle count;

(e) repairing said repairable circuit element before both (i) said repairable circuit element fails and (ii) when said cycle counter reaches said pre-determined cycle count; and

(f) storing a cycle count of a number of cycles counted since an initial power up in a memory circuit and resuming counting from said stored cycle count after a power down/power up cycle of said integrated circuit.

22. The method of claim 21, wherein said step (e) includes permanently disabling said repairable circuit element and replacing said repairable circuit element with a redundant circuit element having the same function as said repairable circuit element.

23. The method of claim 21, wherein said pulsed signal is a clock signal and said repairable circuit element is responsive to said clock signal.

24. The method of claim 21, further including:

said cycle counter generating a trigger signal when said predetermined cycle count is reached; and

said repair processor receiving said trigger signal and repairing said repairable circuit element when said trigger signal is received.

25. The method of claim 24, wherein said trigger signal comprises a subset of a set of bits encoding a current cycle count of said cycle counter.

26. The method of claim 21, wherein said repairable circuit element is selected from the group consisting of a digital circuit, an analog circuit, a memory circuit, a latch, a logic gate, a group of logic gates, an individual device, a transistor, a diode, a resistor, a capacitor, an inductor and a wire.

27. The method of claim 21, wherein selected gates of a field programmable gate array are used to implement said repairable circuit element, and said repair processor programs a replacement of said selected gates of said field programmable gate array with previously unused gates of said field programmable gate array.

28. The method of claim 21, further including said repair processor performing multiple repairs by repairing previously repaired repairable circuit elements.

29. A method of preemptively repairing an integrated circuit, comprising:

(a) providing a pulse generator for generating a pulsed signal;

(b) providing a cycle counter for counting cycles of said pulsed signal;

(c) providing one or more repairable circuit elements;

(d) providing a repair processor for repairing a repairable circuit element of said one or more repairable circuit elements when said cycle counter reaches a pre-determined cycle count;

(e) repairing said repairable circuit element before both (i) said repairable circuit element fails and (ii) when said cycle counter reaches said pre-determined cycle count;

(f) providing a redundant cycle counter; and

(g) said repair processor automatically replacing said cycle counter with said redundant cycle counter when said cycle counter reaches a fixed cycle count.

30. The method of claim 29, wherein said step (e) includes permanently disabling said repairable element and replacing said repairable circuit element with a redundant circuit element having the same function as said repairable circuit element.

31. The method of claim 29, wherein said pulsed signal is a clock signal and said repairable circuit element is responsive to said clock signal.

32. The method of claim 29, further including:

said cycle counter generating a trigger signal when said predetermined cycle count is reached; and

said repair processor receiving said trigger signal and repairing said repairable circuit element when said trigger signal is received.

33. The method of claim 32, wherein said trigger signal comprises a subset of a set of bits encoding a current cycle count of said cycle counter.

34. The method of claim 29, wherein said repairable circuit element is selected from the group consisting of a digital circuit, an analog circuit, a memory circuit, a latch, a logic gate, a group of logic gates, an individual device, a transistor, a diode, a resistor, a capacitor, an inductor and a wire.

35. The method of claim 29, wherein selected gates of a field programmable gate array are used to implement said repairable circuit element, and said repair processor programs a replacement of said selected gates of said field programmable gate array with previously unused gates of said field programmable gate array.

36. The method of claim 29, further including said repair processor performing multiple repairs by repairing previously repaired repairable circuit elements.