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Defect correction of pixel electrode by connection to gate line

  • US 7,289,188 B2
  • Filed: 02/16/2007
  • Issued: 10/30/2007
  • Est. Priority Date: 04/08/2003
  • Status: Active Grant
First Claim
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1. An array substrate comprising:

  • a substrate;

    a gate signal line formed on the substrate;

    a first insulating layer being formed on the substrate and the gate signal line, and having a first contact hole formed therein;

    a second insulating layer being formed on the first insulating layer, and having a second contact hole and an opening portion formed therein, the first insulating layer exposed externally in the opening portion; and

    a plurality of pixel electrodes formed on the first and second insulating layers, at least one of the pixel electrodes overlapped with the gate signal line in the opening portion.

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