Implantable medical device configured for diagnostic emulation through serial communication
First Claim
1. A medical device (MD) configured for diagnostic emulation including being configured for coupling to an external processor, the MD comprising:
- an internal processor;
an internal clock coupled to the internal processor;
memory;
a bus switch coupled to the internal processor and to the memory to read and write to the memory;
a first address bus coupling the internal processor to the bus switch;
a first data bus coupling the internal processor to the bus switch;
a second address bus coupled to the bus switch;
a second data bus coupled to the bus switch;
wherein the bus switch is adapted to receive an activation signal, wherein upon receiving the activation signal the bus switch is configured to couple the second address bus to the memory, couple the second data bus to the memory, and decouple the internal processor from the memory; and
a serial-parallel interface having a serial communications port, and a parallel port coupled to the second address bus and the second data bus, wherein the serial-parallel interface is configured to receive a serial format address through the serial communications port and output a parallel format address to the second address bus through the parallel port.
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Accused Products
Abstract
An implantable medical device (IMD) with internal processor is configured for diagnostic emulation using an external processor coupled to the internal processor through a high speed serial link. The native external processor parallel data and address bus content can be converted to a serial communications stream, sent into the device, converted back to parallel address and data bus formats, and used to drive the device in place of the internal processor. The serial communication allows use of a small number of contact pads, conductors, or feed-throughs, depending on the device. Some devices allow serialized communication through the feed-through typically used for electrical stimulation. The devices can be used to enhance diagnostic testing with capabilities such as faster testing and more realistic testing. The IMD can be a wide variety of implantable devices such as neuro stimulators, pace makers, defibrillators, drug delivery pumps, diagnostic recorders, cochlear implants, and the like. The device can have a bus switch, which when activated, decouples the internal processor, and couples address and data buses containing information and commands provided by the external emulator through the serial communication channel.
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Citations
27 Claims
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1. A medical device (MD) configured for diagnostic emulation including being configured for coupling to an external processor, the MD comprising:
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an internal processor; an internal clock coupled to the internal processor; memory; a bus switch coupled to the internal processor and to the memory to read and write to the memory; a first address bus coupling the internal processor to the bus switch; a first data bus coupling the internal processor to the bus switch; a second address bus coupled to the bus switch; a second data bus coupled to the bus switch; wherein the bus switch is adapted to receive an activation signal, wherein upon receiving the activation signal the bus switch is configured to couple the second address bus to the memory, couple the second data bus to the memory, and decouple the internal processor from the memory; and a serial-parallel interface having a serial communications port, and a parallel port coupled to the second address bus and the second data bus, wherein the serial-parallel interface is configured to receive a serial format address through the serial communications port and output a parallel format address to the second address bus through the parallel port. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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22. A medical device (MD) configured for diagnostic emulation including being configured for coupling to an external processor, the MD comprising:
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an internal processor; an internal clock coupled to the internal processor; memory coupled to the internal processor in a parallel format connection; a first address bus coupling the internal processor to the memory; a first data bus coupling the internal processor to the memory; a second address bus; a second data bus; means for receiving an externally generated activation signal; means for bus switching to selectively switch the memory from operation by the internal processor through the first address and first data bus to configuration for operation by the external processor through the second address bus and second data bus, responsive to reception of the externally generated activation signal; means for sending and receiving serial data communication to and from the MD; means for converting serial format data into parallel format coupled to the second address bus and second data bus; and means for converting the parallel format data to serial format coupled to the second address bus and second data bus. - View Dependent Claims (23, 24, 25, 26, 27)
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Specification