Low-noise high-stability crystal oscillator

• US 7,292,114 B2
• Filed: 10/03/2005
• Issued: 11/06/2007
• Est. Priority Date: 08/01/2005
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: Marvell World Trade Limited (Marvell Technology Group Limited)
• Inventors: Greenberg, Jody
• Primary Examiner(s): Kinkead; Arnold
• Application Number:
  US11/242,621
• Publication Number:
  US 20070024385A1
• Time in Patent Office: 764 Days
• Field of Search: 331/116.R, 331/158, 331/116.FE, 331/74, 331/175
• US Class Current: 331/158
• CPC Class Codes: H03B 5/364 the amplifier comprising field effect transistors H03B5/366 takes precedence
• CPC Class Codes: H03L 5/00 Automatic control of voltage, current, or power

Abstract

Circuits, methods, and apparatus that provide low-noise, high-stability crystal oscillators having controlled-amplitude differential output signals and DC level control. A crystal oscillator circuit has two feedback loops, one for setting the DC level of its signals, the other for adjusting the amplitude of those signals. The DC level feedback loop can set the DC component of the oscillator signals to a voltage midway between two supply voltages. The amplitude control loop sets the amplitude of the output of the crystal oscillator signal to be within a range. The amplitude can be set to provide a maximum swing without clipping the supply voltages in order to provide high-stability and minimal jitter. The amplitude control circuit can also be digital for improved noise performance. The time constants of these two loops can be separated such that instabilities are avoided.

Claims

1. An integrated circuit comprising:

a gain element configured to drive a crystal;

a DC control loop configured to adjust a DC level of a signal at an output of the gain element; and

an amplitude control loop configured to adjust an amplitude of the signal at the output of the gain element,

wherein the DC control loop comprises an amplifier in communication with the gain element, the amplifier separate from the amplitude control loop.

2. The integrated circuit of claim 1 wherein the gain element has an input responsive to a first node of the crystal and the crystal has a second node responsive to the output of the gain element.

3. The integrated circuit of claim 2 wherein the gain element is a transistor.

4. The integrated circuit of claim 3 wherein the transistor is a MOS transistor.

5. The integrated circuit of claim 1 wherein the amplifier is configured to compare a signal generated by the output of the gain element to a bias voltage and provide an output responsive to the comparison.

6. The integrated circuit of claim 5 wherein the gain element is a MOS transistor responsive to the output of the amplifier.

7. The integrated circuit of claim 6 wherein the DC level of the signal at the output of the gain element is adjusted to a voltage that is between two supply voltages received by the integrated circuit.

8. The integrated circuit of claim 1 wherein the amplitude control loop comprises an amplitude measurement circuit configured to provide a measurement of an amplitude of the signal at the input of the gain element.

9. The integrated circuit of claim 8 wherein the amplitude measurement circuit comprises a peak detect circuit.

10. The integrated circuit of claim 9 wherein the peak detect circuit comprises a diode and a capacitance.

15. The integrated circuit of claim 1 wherein the DC level of a signal generated by the output of the gain element is used to set a DC level of a signal at an input of the gain element.

16. The integrated circuit of claim 15 wherein the DC level of the signal at the output of the gain element is DC coupled to the input of the gain element using at least one resistor.

11. An integrated circuit comprising:

a gain element configured to drive a crystal;

a DC control loop configured to adjust a DC level of a signal at an output of the gain element; and

an amplitude control loop configured to adjust an amplitude of the signal at the output of the gain element,

wherein the amplitude control loop comprises an amplitude measurement circuit configured to provide a measurement of an amplitude of the signal at the input of the gain element and a comparator configured to compare the measurement of the amplitude of the signal at the input of the gain element with a high threshold and a low threshold, the comparator further configured to provide one or more signals in response to the comparisons.

12. The integrated circuit of claim 11 wherein the amplitude control loop further comprises a counter configured to increment, decrement, or maintain an output value in response to the one or more signals provided by the comparator.

13. The integrated circuit of claim 12 wherein the amplitude control loop further comprises a digital-to-analog converter configured to convert the output of the counter to a current.

14. The integrated circuit of claim 13 wherein the current is provided to the gain element.

17. A method of generating a first oscillator signal comprising:

driving a resonant element to generate a first oscillator signal;

adjusting a DC level of the first oscillator signal; and

adjusting an amplitude of the first oscillator signal,

wherein adjusting the DC level comprises using an amplifier separate from a control loop for adjusting the amplitude of the first oscillator signal.

18. The method of claim 17 wherein the driving the resonant element is performed by providing a drive signal to the resonant element, and wherein the drive signal is responsive to the resonant element.

19. The method of claim 18 further comprising providing the drive signal with a gain circuit.

20. The method of claim 19 wherein the gain circuit is a MOS transistor.

21. The method of claim 17 further comprising:

adjusting the DC level of the first oscillator signal by;

comparing the first oscillator signal with a bias voltage; and

providing an output responsive to the comparison.

22. The method of claim 21 wherein the gain element is a MOS transistor responsive to the output of the amplifier.

23. The method of claim 22 further comprising adjusting the DC level of the first oscillator signal to be between two supply voltages received by the integrated circuit.

24. The method of claim 17 further comprising:

measuring an amplitude of a second oscillator signal; and

providing a measurement of the amplitude of the second oscillator signal.

25. The method of claim 24 further comprising measuring the amplitude of the second oscillator signal using a peak detector.

26. The method of claim 25 wherein the amplitude of the second oscillator signal is measured using a diode and a capacitance.

31. The method of claim 17 further comprising setting the DC level of the second oscillator signal using the DC level of the first oscillator signal.

32. The method of claim 31 further comprising DC coupling the DC level of the first oscillator signal to generate the DC level of the second oscillator signal.

27. A method of generating a first oscillator signal comprising:

driving a resonant element to generate a first oscillator signal;

adjusting a DC level of the first oscillator signal; and

adjusting an amplitude of the first oscillator signal by;

measuring an amplitude of a second oscillator signal;

providing a measurement of the amplitude of the second oscillator signal;

comparing the measurement of the amplitude of the second oscillator signal with a high threshold and a low threshold; and

providing one or more signals in response to the comparison.

28. The method of claim 27 further comprising:

decrementing an output value when the amplitude of the second oscillator signal is greater than the high threshold;

maintaining the output value when the amplitude of the second oscillator signal is less than the high threshold and greater than the low threshold; and

incrementing the output value when the amplitude of the second oscillator signal is less than the low threshold.

29. The method of claim 28 further comprising generating a bias current in response to the output value.

30. The method of claim 29 further comprising providing the bias current to a gain circuit, the gain circuit providing the drive to the resonant element.

33. An integrated circuit comprising:

a gain element configured to drive a resonant element;

a DC control loop configured to adjust a DC level of a signal at an output of the gain element; and

an amplitude control loop configured to adjust an amplitude of the signal at the output of the gain element,

wherein the DC control loop comprises an amplifier in communication with the gain element, the amplifier separate from the amplitude control loop.

34. The integrated circuit of claim 33 wherein the resonant element is included on the integrated circuit.