Systems and methods for self-test of a radar altimeter

• US 7,295,151 B2
• Filed: 12/19/2005
• Issued: 11/13/2007
• Est. Priority Date: 12/19/2005
• Status: Expired

• Current Assignee: Honeywell International Inc.
• Original Assignee: Honeywell International Inc.
• Inventors: Vacanti, David C.
• Primary Examiner(s): Tarcza; Thomas H.
• Assistant Examiner(s): Chen; Shelley
• Application Number:
  US11/306,185
• Publication Number:
  US 20070139259A1
• Time in Patent Office: 694 Days
• Field of Search: 342/173
• US Class Current: 342/173
• CPC Class Codes: G01S 13/34 using transmission of continuous, frequency-modulated waves while heterodyning the received signal, or a signal derived therefrom, with a locally-generated signal related to the contemporaneously transmitted signal
• CPC Class Codes: G01S 13/882 for altimeters measuring height using barometric means G01C5/06
• CPC Class Codes: G01S 7/35 Details of non-pulse systems
• CPC Class Codes: G01S 7/4004 of parts of a radar system
• CPC Class Codes: H03L 7/06 using a reference signal applied to a frequency- or phase-locked loop

Abstract

Systems and methods for testing a signal generated by a Direct Digital Synthesizer (DDS) in a radar altimeter. In an embodiment of the method, a voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS based on a clock-based reference signal is generated. The generated voltage signal is integrated over a predefined range of clock signals. The integration is sampled at a previously defined clock tick. The sample is compared to a desired value and an indication that the radar altimeter is malfunctioning is provided if the comparison exceeds a predefined threshold value. The radar altimeter system is deactivated if an indication that the radar altimeter is malfunctioning has been provided.

Claims

1. A radar altimeter system including a transmitter having a Direct Digital Synthesizer (DDS) and a Digital Phase Lock Loop, the system comprising:

a first component configured to generate a voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS based on a clock-based reference signal;

a second component configured to integrate the generated voltage signal over a predefined range of clock signals;

a third component configured to sample the integration at a previously defined clock tick;

a fourth component configured to compare the sample to a desired value; and

a fifth component configured to provide an indication that the radar altimeter is malfunctioning if the comparison exceeds a predefined threshold value.

2. The system of claim 1, further comprising a device configured to deactivate the radar altimeter system if an indication that the radar altimeter is malfunctioning has been provided.

3. The system of claim 1, wherein the second component includes a device configured to perform a reset function.

4. A method for testing a signal generated by a Direct Digital Synthesizer (DDS) in a radar altimeter, the method comprising:

generating a voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS based on a clock-based reference signal;

integrating the generated voltage signal over a predefined range of clock signals;

sampling the integration at a previously defined clock tick;

comparing the sample to a desired value; and

providing an indication that the radar altimeter is malfunctioning if the comparison exceeds a predefined threshold value.

5. The method of claim 4, further comprising deactivating the radar altimeter system if an indication that the radar altimeter is malfunctioning has been provided.

6. The method of claim 4, further comprising performing a reset function.

7. A method for testing a signal generated by a Direct Digital Synthesizer (DDS) in a radar altimeter, the method comprising:

activating the radar altimeter in a normal mode of operation;

integrating a generated voltage signal between a turnaround point and a clock tick;

comparing a detected integration value to a reference voltage value; and

deactivating the radar altimeter system if the comparison is outside a predefined threshold value.

8. The method of claim 7, wherein activating further comprises generating a voltage signal.

9. The method of claim 8, wherein generating further comprises generating the voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS based on a clock based reference signal.

10. The method of claim 7, wherein comparing further comprises sampling the integration at a previously defined clock tick.

11. The method of claim 7, further comprising performing a reset function.