Fibre channel implementation using network processors
First Claim
Patent Images
1. A method for Fibre Channel ingress data flow with network processors, said method comprising the steps of:
- receiving a frame from a network;
moving the frame into a buffer memory;
parsing the frame header;
decoding addresses in the frame header;
performing a cyclic redundancy check on the frame for detecting transmission errors;
performing a table lookup for determining a destination port;
creating a frame descriptor having a data structure describing where the frame is stored in the buffer memory and to what egress port number the frame is to be sent;
imbedding the destination port into the frame descriptor;
queuing the frame descriptor for transmission to a fabric processor; and
forwarding cells of the frame to a switch fabric interface bridge.
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Abstract
Network processors controlled by software are used to implement the FC-1 and FC-2 layer functions. Each Network Processor comprises a fabric processor, an executive processor, channel processors and associated serial data processors. Special ASICs are not required since all of the Fiber Channel layers may be implementation with the network processors under software control.
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Citations
24 Claims
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1. A method for Fibre Channel ingress data flow with network processors, said method comprising the steps of:
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receiving a frame from a network; moving the frame into a buffer memory; parsing the frame header; decoding addresses in the frame header; performing a cyclic redundancy check on the frame for detecting transmission errors; performing a table lookup for determining a destination port; creating a frame descriptor having a data structure describing where the frame is stored in the buffer memory and to what egress port number the frame is to be sent; imbedding the destination port into the frame descriptor; queuing the frame descriptor for transmission to a fabric processor; and forwarding cells of the frame to a switch fabric interface bridge. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method for Fibre Channel egress data flow with network processors, said method comprising the steps of:
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receiving cells of a frame from a switch fabric interface bridge; reassembling the frame from the received cells and storing the frame in a buffer memory, wherein when a first cell of the frame is received a frame descriptor is allocated for keeping track of the frame location in the buffer memory; determining which port to send the frame upon receiving a start of frame cell; queuing the frame for transmission when an end of frame cell is received; and transmitting the frame from the port. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A method for Fibre Channel ingress control flow with network processors, said method comprising the steps of:
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(a) receiving a frame from a network; (b) moving the frame into a buffer memory; (c) parsing the frame header; (d) decoding addresses in the frame header; (e) performing a cyclic redundancy check on the frame for detecting transmission errors; (f) performing a table lookup for determining a destination port; (g) creating a frame descriptor having a data structure describing where the frame is stored in the buffer memory and to what egress port number the frame is to be sent; (h) queuing the frame descriptor for sending to a line card processor; (i) processing the frame, wherein, (1) if the frame is valid, then queuing the frame for transmission to the line card processor and then going to step (j), (2) if not, then sending a negative-acknowledge character or dropping the frame, and then terminating ingress control flow for that frame; (j) moving the frame data to a local memory of the line card processor; and (k) notifying the line card processor that the frame is in the line card processor local memory. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22)
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23. A method for Fibre Channel data flow with network processors, said method comprising the steps of:
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receiving a frame from a network with a first network processor; moving the frame into a first buffer memory coupled to the first network processor; parsing the frame header with the first network processor; decoding addresses in the frame header with the first network processor; performing a cyclic redundancy check on the frame for detecting transmission errors with the first network processor; performing a table lookup for determining a destination port with the first network processor; creating a frame descriptor with the first network processor, the frame descriptor having a data structure describing where the frame is stored in the first buffer memory and to what egress port number the frame is to be sent; imbedding the destination port into the frame descriptor; queuing the frame descriptor for transmission to a fabric processor associated with the first network processor; forwarding cells of the frame to a switch fabric interface bridge with the first network processor; receiving cells of the frame from the switch fabric interface bridge with a second network processor; reassembling the frame from the received cells with the second network processor and storing the frame in a second buffer memory coupled to the second network processor, wherein when a first cell of the frame is received a frame descriptor is allocated for keeping track of the frame location in the second buffer memory; determining with the second network processor which port to send the frame upon receiving a start of frame cell; queuing the frame for transmission with the second network processor when an end of frame cell is received by the second network processor; and transmitting the frame with the second network processor from an egress port.
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24. A method for Fibre Channel control flow with network processors, said method comprising the steps of:
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(a) receiving a frame from a network with a first network processor; (b) moving the frame into a buffer memory coupled to the first network processor; (c) parsing the frame header with the first network processor; (d) decoding addresses in the frame header with the first network processor; (e) performing a cyclic redundancy check with the first network processor on the frame for detecting transmission errors; (f) performing a table lookup with the first network processor for determining a destination port; (g) creating a frame descriptor with the first network processor, the frame descriptor having a data structure describing where the frame is stored in the first buffer memory and to what egress port number the frame is to be sent; (h) queuing the frame descriptor for sending to a line card processor; (i) processing the frame, wherein, (1) if the frame is valid, then queuing the frame for transmission to the line card processor and then going to step (j), (2) if not, then sending a negative-acknowledge character or dropping the frame, and then terminating ingress control flow for that frame; (j) moving the frame data to a local memory of the line card processor; (k) notifying the line card processor with the first network processor that the frame is in the line card processor local memory; (l) notifying a second network processor to send the frame; (m) transferring the frame into a local memory of the second network processor; (n) formatting the frame; (o) determining the egress port for transmission of the frame; (p) queuing the frame for transmission from the egress port; and (q) transmitting the frame from the egress port to a destination.
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Specification