Replaceable scheduling algorithm in multitasking kernel

• US 7,296,271 B1
• Filed: 06/28/2000
• Issued: 11/13/2007
• Est. Priority Date: 06/28/2000
• Status: Expired due to Term

• Current Assignee: Emc IP Holding Company LLC (Dell Technologies Inc.)
• Original Assignee: EMC Corporation (Dell Technologies Inc.)
• Inventors: Chalmer, Steven R., McClure, Steven T.
• Primary Examiner(s): An; Meng-Al T.
• Assistant Examiner(s): To; Jennifer N.
• Application Number:
  US09/605,812
• Time in Patent Office: 2,694 Days
• Field of Search: 709/100, 709/101, 718100-108, 712/202, 712/228
• US Class Current: 718/108
• CPC Class Codes: G06F 9/4484 Executing subprograms
• CPC Class Codes: G06F 9/461 Saving or restoring of program or task context
• CPC Class Codes: G06F 9/4812 by interrupt, e.g. masked
• CPC Class Codes: G06F 9/4843 by program, e.g. task dispatcher, supervisor, operating system
• CPC Class Codes: G06F 9/52 Program synchronisation; Mutual exclusion, e.g. by means of semaphores

Abstract

Disclosed is providing one of a plurality of schedulers for a multitasking system for a processor that includes choosing a particular one of the schedulers, setting a program counter to an address corresponding to code of the particular one of the schedulers, and the processor executing code at an address corresponding to the program counter. Also included may be setting a stack pointer to an address corresponding to stack space for the particular one of the schedulers and the processor using the stack space at the stack pointer after executing code at the address corresponding to the program counter. The system described herein provides a small kernel that can run on a variety of hardware platforms, such as a PowerPC based Symmetrix adapter board used in a Symmetrix data storage device provided by EMC Corporation of Hopkinton, Ma. The core kernel code may be written for the general target platform, such as the PowerPC architecture. Since the PowerPC implementation specific modules are well defined, the system may be quite portable between PowerPC processors (such as the 8260 and 750), and should prove relatively easy to port to any PowerPC based Symmetrix adapter board/CPU combination. The kernel may also be ported to run on other RISC machines (Hitachi SH series) and can be ported to CISC architectures.

Claims

1. A method of switching during run time from a first scheduler to a second scheduler for a multitasking system for a processor, comprising:

choosing the second scheduler from a plurality of schedulers, wherein at least one of the plurality of schedulers selects processes to be run from a plurality of runable processes different from the plurality of schedulers and wherein choosing the second scheduler is based on parameters that vary according to run time conditions;

setting, during a context switch operation, a program counter to an address corresponding to code of the second scheduler; and

the processor executing code of the second scheduler at an address corresponding to the program counter.

2. A method, according to claim 1, further comprising:

setting a stack pointer to an address corresponding to stack space for the second scheduler; and

the processor using the stack space at the stack pointer after executing code at the address corresponding to the program counter.

3. A method, according to claim 1, wherein all of the schedulers use the same stack.

4. A method, according to claim 1, wherein at least one of the schedulers is for statistical code profiling.

5. A method, according to claim 1, wherein the first scheduler is for start up conditions and the second scheduler is for steady state operation.

6. A method, according to claim 1, wherein choosing the second scheduler is performed by setting up a return from an exception that causes the scheduler to execute.

7. A method, according to claim 1, wherein setting a program counter includes modifying a variable that is modified according to the second scheduler.

8. A method of scheduling tasks in a multitasking operating system, comprising:

using a first scheduler to schedule tasks;

choosing a second scheduler from a plurality of schedulers, wherein at least one of the plurality of schedulers selects processes to be run from a plurality of runable processes different from the plurality of schedulers and wherein choosing the second scheduler is based on parameters that vary according to run time conditions; and

switching, during run time, from using the first scheduler to schedule tasks to using the second scheduler to schedule task, wherein switching to using the second scheduler includes setting a program counter to an address corresponding to code of the second scheduler.

9. A method, according to claim 8, wherein choosing the second scheduler is performed by setting up a return from an exception that causes the second scheduler to execute.

10. A method, according to claim 8, wherein setting a program counter includes modifying a variable that is modified according to the second scheduler.

11. A method, according to claim 8, further comprising:

setting a stack pointer to an address corresponding to stack space for the second scheduler; and

the processor using the stack space at the stack pointer after executing code at the address corresponding to the program counter.

12. A method, according to claim 8, wherein all of the schedulers use the same stack.

13. A method, according to claim 8, wherein at least one of the schedulers is for statistical code profiling.

14. A method, according to claim 8, wherein the first scheduler is for start up conditions and the second scheduler is for steady state operation.

15. Computer software in combination with a computer readable medium that switches, during run time, from a first scheduler to a second scheduler for a multitasking system for a processor, comprising:

executable code, provided on a computer readable medium, that chooses the second scheduler from a plurality of schedulers wherein at least one of the plurality of schedulers selects processes to be run from a plurality of runable processes different from the plurality of schedulers and wherein executable code that chooses the second scheduler uses parameters that vary according to run time conditions;

executable code, provided on a computer readable medium, that sets a program counter to an address corresponding to code of the second scheduler; and

executable code, provided on a computer readable medium, that causes the processor to execute code at an address corresponding to the program counter.

16. Computer software, according to claim 15, further comprising:

executable code, provided on a computer readable medium, that sets a stack pointer to an address corresponding to stack space for the second scheduler; and

executable code, provided on a computer readable medium, that causes the processor to use the stack space at the stack pointer after executing code at the address corresponding to the program counter.

17. Computer software, according to claim 15, wherein all of the schedulers use the same stack.

18. Computer software, according to claim 15, wherein at least one of the schedulers is for statistical code profiling.

19. Computer software, according to claim 15, wherein the first scheduler is for start up conditions and the second scheduler is for steady state operation.

20. Computer software, according to claim 15, wherein executable code that causes the processor to execute code at an address sets up a return from an exception that causes the second scheduler to execute.

21. Computer software, according to claim 15, wherein executable code that sets a program counter modifies a variable according to the second scheduler.

22. Computer software in combination with a computer readable medium that schedules tasks in a multitasking operating system, comprising:

executable code, provided on a computer readable medium, that uses a first scheduler to schedule tasks;

executable code, provided on a computer readable medium, that chooses a second scheduler from a plurality of schedulers, wherein at least one of the plurality of schedulers selects processes to be run from a plurality of runable processes different from the plurality of schedulers and wherein executable code that chooses the second scheduler uses parameters that vary according to run time conditions; and

executable code, provided on a computer readable medium, that switches, during run time, from using the first scheduler to schedule tasks to using the second scheduler to schedule tasks, wherein executable code that switches to using the second scheduler sets a program counter to an address corresponding to code of the second scheduler.

23. Computer software, according to claim 22, wherein executable code that chooses the second scheduler sets up a return from an exception that causes the scheduler to execute.

24. Computer software, according to claim 22, wherein setting a program counter includes modifying a variable that is modified according to the second scheduler.

25. Computer software, according to claim 22, further comprising:

executable code, provided on a computer readable medium, that sets a stack pointer to an address corresponding to stack space for the second scheduler; and

executable code, provided on a computer readable medium, that causes the processor to use the stack space at the stack pointer after executing code at the address corresponding to the program counter.

26. Computer software, according to claim 22, wherein all of the schedulers use the same stack.

27. Computer software, according to claim 22, wherein at least one of the schedulers is for statistical code profiling.

28. Computer software, according to claim 22, wherein the first scheduler is for start up conditions and the second scheduler is for steady state operation.