Method for assisting video compression in a computer system
First Claim
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1. A method for compressing video data in a computer system comprising:
- receiving a current video frame at a dedicated video input of a core logic chip in the computer system directly from a video source originating the video frame, the computer system including the core logic chip for directly coupling a processor to a system memory and for coupling the processor and the system memory to a system bus;
computing at the core logic chip a difference frame from the current video frame and a previous video frame as the current video frame streams into the dedicated video input of the core logic chip, the previous video frame being received at the core logic chip as a previous current video frame and retained therein, the difference frame including computing the difference frame in the core logic chip within the computer system, wherein the core logic chip is a north bridge chip;
storing the difference frame directly from the core logic chip to the system memory in the computer system via a dedicated memory interface therebetween; and
the processor retrieving the difference frame directly from the system memory via the core logic chip using a dedicated processor interface therebetween to complete compression of the video data.
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Abstract
One embodiment of the present invention provides a method that facilitates compression of video data in a computer system by performing the time-consuming task of computing the difference between successive frames of video data independently from the central processing unit. This frees the often-overburdened central processing unit from performing this time-consuming compression operation and can thereby improve the handling of video data. Thus, one embodiment of the present invention can be characterized as a method for compressing video data in a computer system. This method includes receiving a stream of data from a current video frame in the computer system. It also includes computing a difference frame from the current video frame and a previous video frame “on-the-fly” as the current video frame streams into the computer system. The method additionally includes storing the difference frame in a memory in the computer system.
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Citations
17 Claims
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1. A method for compressing video data in a computer system comprising:
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receiving a current video frame at a dedicated video input of a core logic chip in the computer system directly from a video source originating the video frame, the computer system including the core logic chip for directly coupling a processor to a system memory and for coupling the processor and the system memory to a system bus; computing at the core logic chip a difference frame from the current video frame and a previous video frame as the current video frame streams into the dedicated video input of the core logic chip, the previous video frame being received at the core logic chip as a previous current video frame and retained therein, the difference frame including computing the difference frame in the core logic chip within the computer system, wherein the core logic chip is a north bridge chip; storing the difference frame directly from the core logic chip to the system memory in the computer system via a dedicated memory interface therebetween; and the processor retrieving the difference frame directly from the system memory via the core logic chip using a dedicated processor interface therebetween to complete compression of the video data. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for compressing video data in a computer system, comprising:
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receiving a current video frame at a dedicated video input of a core logic chip in the computer system directly from a video source originating the video frame, the computer system including the core logic chip for directly coupling a processor to a system memory and for coupling the processor and the system memory to a system bus; computing at the core logic chip a difference frame from the current video frame and a previous video frame as the current video frame streams into the dedicated video input of the core logic chip, the previous video frame being received at the core logic chip as a previous current video frame and retained therein, the difference frame including computing an exclusive-OR between the current video frame and the previous video frame, and wherein computing the difference frame includes computing the difference frame in the core logic chip within the computer system, wherein the core logic chip is a north bridge chip; storing the difference frame directly from the core logic chip into the system memory in the computer system via a dedicated memory interface therebetween; storing the current video frame directly from the core logic chip into the system memory in the computer system using a dedicated processor interface therebetween; the processor retrieving the difference frame directly from the system memory via the core logic chip; and compressing the video data using the difference frame to produce compressed video data. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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Specification
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Current AssigneeRound Rock Research LLC
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Original AssigneeMicron Technology, Inc.
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InventorsKlein, Dean A.
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Primary Examiner(s)Tran; Trang U.
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Application NumberUS09/048,933Publication NumberTime in Patent Office3,526 DaysField of Search348/715, 348/716, 348/717, 348/690, 348/567, 348/568, 348/412.1, 348/418.1, 348/430.1, 348718-719, 348/552, 375/240.12, 708/203US Class Current348/715CPC Class CodesH04N 19/503 involving temporal predicti...H04N 21/4143 embedded in a Personal Comp...
