Semiconductor integrated circuit device

• US 7,298,600 B2
• Filed: 04/13/2005
• Issued: 11/20/2007
• Est. Priority Date: 02/21/2000
• Status: Expired due to Term

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Technology Corporation (Renesas Electronics Corporation)
• Inventors: Kasahara, Masumi, Tanaka, Satoshi, Takikawa, Kumiko
• Primary Examiner(s): Sherry; Michael
• Assistant Examiner(s): Nguyen; Danny
• Application Number:
  US11/104,541
• Publication Number:
  US 20050185355A1
• Time in Patent Office: 951 Days
• Field of Search: 361 56- 58, 361/91.1, 361/111, 361/119, 455/323
• US Class Current: 361/56
• CPC Class Codes: H01L 27/0255 using diodes as protective elements
• CPC Class Codes: H01L 27/0259 using bipolar transistors as protective elements
• CPC Class Codes: H03F 1/52 Circuit arrangements for protecting such amplifiers monitoring arrangements G01R31/28; increasing reliability in communication systems, e.g. using redundancy H04B1/74
• CPC Class Codes: H03F 2200/372 Noise reduction and elimination in amplifier

Abstract

Into an internal circuit to operate in a high-frequency band, there is incorporated a protective circuit of a multistage connection which is constructed to include a plurality of diode-connected transistors having a low parasitic capacity and free from a malfunction even when an input signal higher than the power supply voltage is applied. Into an internal circuit to operate in a low-frequency band, there is incorporated a protective circuit which is constructed to include one diode-connected transistor. The protective circuits include two lines of protective circuit, in which the directions of electric currents are so reversed as to protect the internal circuits against positive/negative static electricities.

Claims

1. A semiconductor integrated circuit device for use in a wireless communication mobile terminal device, comprising:

a protective circuit which is provided a high frequency signal received by an antenna of the wireless communication mobile terminal device;

an amplifying transistor which is coupled to the protective circuit and which amplifies the high frequency signal and outputs an amplified high frequency signal; and

a reception mixer which converts a frequency of the amplified high frequency signal into a lower frequency,

wherein the protective circuit, the amplifying transistor and the reception mixer are formed on a same semiconductor chip of the semiconductor integrated circuit device,

wherein the protective circuit prevents electrostatic breakdown of the semiconductor chip,

wherein the semiconductor chip includes a first voltage line which is supplied with a first voltage and a second voltage line which is supplied with a second voltage lower than the first voltage,

wherein the protective circuit is arranged between the first voltage line and the second voltage line and includes a signal node which receives the high frequency signal, a first protection unit which allows an electric current flow from the first voltage line to the signal node and a second protection unit which allows an electric current flow from the signal node to the second voltage line,

wherein the first protection unit includes a plurality of first diodes which are connected in series and are arranged between the first voltage line and the signal node, and

wherein the second protection unit includes a plurality of second diodes which are connected in series and are arranged between the signal node and the second voltage line.

2. A semiconductor integrated circuit device according to claim 1,

wherein the amplifying transistor is a bipolar transistor and is operated as a low noise amplifier.

3. A semiconductor integrated circuit device according to claim 1,

wherein a demodulator is also formed on the semiconductor chip,

and wherein the demodulator responds to an output signal of the reception mixer and outputs base band I, Q reception signals.

4. A semiconductor integrated circuit device according to claim 3,

wherein a modulator and a transmission mixer are also formed on the semiconductor chip,

and wherein the modulator responds to base band I, Q transmitting signals and supplies an output signal thereof to an input terminal of the transmission mixer.

5. A semiconductor integrated circuit device according to claim 4,

wherein an oscillator is also built within the semiconductor chip,

and wherein the oscillator supplies a reception local frequency signal with the reception mixer and supplies a transmission local frequency signal with the transmission mixer.

6. A semiconductor integrated circuit device according to claim 1,

wherein the semiconductor chip is made of silicon base material.

7. A semiconductor integrated circuit device according to claim 2,

wherein the semiconductor chip is made of silicon base material.

8. A semiconductor integrated circuit device according to claim 3,

wherein the semiconductor chip is made of silicon base material.

9. A semiconductor integrated circuit device according to claim 4,

wherein the semiconductor chip is made of silicon base material.

10. A semiconductor integrated circuit device according to claim 5,

wherein the semiconductor chip is made of silicon base material.

11. A semiconductor integrated circuit device according to claim 1,

wherein the protective circuit further includes a third protection unit which allows an electric current flow from the signal node to the first voltage line and a fourth protection unit which allows an electric current flow from the second voltage line to the signal node,

wherein the third protection unit includes a plurality of third diodes which are connected in series and are arranged between the signal node and the first voltage line,

wherein the fourth protection unit includes a plurality of fourth diodes which are connected in series and are arranged between the second voltage line and the signal node.

12. A semiconductor integrated circuit device according to claim 11,

wherein the first protection unit and the third protection unit (C) are arranged in parallel between the first voltage line and the signal node,

wherein the second protection unit and the fourth protection unit (D) are arranged in parallel between the signal node and the second voltage line.