×

State processor for pattern matching in a network monitor device

  • US 7,299,282 B2
  • Filed: 04/20/2004
  • Issued: 11/20/2007
  • Est. Priority Date: 06/30/2000
  • Status: Expired due to Term
First Claim
Patent Images

1. A processor configured to process contents of packets passing through a connection point on a computer network, the processor comprising:

  • (a) a buffer for receiving at least some of the contents of each packet passing through the connection point;

    (b) a memory containing one or more instructions of an instruction set for the state processor;

    (c) an arithmetic logic unit (ALU) coupled to the buffer;

    (d) a control block coupled to the ALU and to the instruction memory for decoding instructions; and

    (e) a program counter coupled to the instruction memory and to the ALU for indicating the next state processor instruction in the memory to process,wherein the ALU includes a searching apparatus comprising one or more comparators for searching for a reference string in the contents of a packet.

View all claims
  • 4 Assignments
Timeline View
Assignment View
    ×
    ×