Method of forming an oxide film

• US 7,301,211 B2
• Filed: 09/20/2005
• Issued: 11/27/2007
• Est. Priority Date: 02/06/1990
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Zhang, Hongyong
• Primary Examiner(s): Prenty; Mark V.
• Application Number:
  US11/229,651
• Publication Number:
  US 20060011995A1
• Time in Patent Office: 798 Days
• Field of Search: 257/410, 257/347, 257/57, 257/59, 257/66, 257/72
• US Class Current: 257/410
• CPC Class Codes: C23C 14/10 Glass or silica
• CPC Class Codes: H01L 21/02131 the material being halogen doped silicon oxides, e.g. FSG
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02211 the compound being a silane, e.g. disilane, methylsilane or chlorosilane
• CPC Class Codes: H01L 21/02252 formation by plasma treatment, e.g. plasma oxidation of the substrate after treatment of an insulating film by plasma H01L21/3105 and subgroups
• CPC Class Codes: H01L 21/02266 deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/28158 Making the insulator
• CPC Class Codes: H01L 21/31612 on a silicon body
• CPC Class Codes: H01L 21/31629 Deposition of halogen doped silicon oxide, e.g. fluorine doped silicon oxide
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate

Abstract

A method of forming an oxide film and a method of manufacturing an electronic device utilizing the oxide film is disclosed. A silicon oxide film is formed on a substrate by sputtering. Therefore, the film formation is carried out at a low temperature. The sputtering atmosphere. comprises an oxidizing gas and an inert gas such as argon. In order to prevent fixed electric charges from being generated in the film and to obtain an oxide film of good properties, the proportion of argon is adjusted to 20% or less. Alternatively, a gas including halogen elements such as fluorine is added to the above sputtering atmosphere at a proportion less than 20%. Hereupon, alkali ions and dangling bonds of silicon in the oxide film are neutralized by the halogen elements, whereby a fine oxide film is obtained.

Claims

1. A display comprising:

a substrate comprising plastic;

a gate electrode over the substrate comprising plastic;

a gate insulating film comprising silicon oxide over the gate electrode;

a semiconductor layer over the gate insulating film; and

source and drain electrodes over the semiconductor layer,

wherein the gate insulating film comprises fluorine and the proportion of fluorine/silicon in the gate insulating film is 5 atom % or less,

wherein the gate insulating film comprises an inert gas element, and

wherein the gate electrode and the source and drain electrodes comprise aluminum.

2. A display according to claim 1 is a liquid crystal display.

3. A display according to claim 1, wherein the semiconductor layer is crystalline semiconductor layer.

4. A display according to claim 1, wherein the semiconductor layer is polycrystalline semiconductor layer.

31. A display according to claim 1, wherein the inert gas element is an argon element.

5. A display comprising:

a substrate comprising plastic;

a gate electrode over the substrate comprising plastic;

a gate insulating film comprising silicon oxide over the gate electrode;

a semiconductor layer over the gate insulating film, wherein the semiconductor layer comprises a N-type source region and a N-type drain region; and

source and drain electrodes over the semiconductor layer,

wherein the gate insulating film comprises fluorine and the proportion of fluorine/silicon in the gate insulating film is 5 atom % or less,

wherein the gate insulating film comprises an inert gas element, and

wherein the gate electrode and the source and drain electrodes comprise aluminum.

6. A display according to claim 5 is a liquid crystal display.

7. A display according to claim 5, wherein the semiconductor layer is crystalline semiconductor layer.

8. A display according to claim 5, wherein the semiconductor layer is polycrystalline semiconductor layer.

32. A display according to claim 5, wherein the inert gas element is an argon element.

9. A display comprising:

a substrate comprising plastic;

a gate electrode over the substrate comprising plastic;

a gate insulating film comprising silicon oxide over the gate electrode;

a semiconductor layer over the gate insulating film, wherein the semiconductor layer comprises a P-type source region and a P-type drain region; and

source and drain electrodes over the semiconductor layer,

wherein the gate insulating film comprises fluorine and the proportion of fluorine/silicon in the gate insulating film is 5 atom % or less,

wherein the gate insulating film comprises an inert gas element, and

wherein the gate electrode and the source and drain electrodes comprise aluminum.

10. A display according to claim 9 is a liquid crystal display.

11. A display according to claim 9, wherein the semiconductor layer is crystalline semiconductor layer.

12. A display according to claim 9, wherein the semiconductor layer is polycrystalline semiconductor layer.

33. A display according to claim 9, wherein the inert gas element is an argon element.

13. An image sensor comprising:

a substrate comprising plastic;

a gate electrode over the substrate comprising plastic;

a gate insulating film comprising silicon oxide over the gate electrode;

a semiconductor layer over the gate insulating film; and

source and drain electrodes over the semiconductor layer,

wherein the gate insulating film comprises fluorine and the proportion of fluorine/silicon in the gate insulating film is 5 atom % or less,

wherein the gate insulating film comprises an inert gas element, and

wherein the gate electrode and the source and drain electrodes comprise aluminum.

14. An image sensor according to claim 13, wherein the semiconductor layer is crystalline semiconductor layer.

15. An image sensor according to claim 13 wherein the semiconductor layer is polycrystalline semiconductor layer.

34. An image sensor according to claim 13, wherein the inert gas element is an argon element.

16. An image sensor device comprising:

a substrate comprising plastic;

a gate electrode over the substrate comprising plastic;

a gate insulating film comprising silicon oxide over the gate electrode;

a semiconductor layer over the gate insulating film, wherein the semiconductor layer comprises a N-type source region and a N-type drain region; and

source and drain electrodes over the semiconductor layer,

wherein the gate insulating film comprises fluorine and the proportion of fluorine/silicon in the gate insulating film is 5 atom % or less,

wherein the gate insulating film comprises an inert gas element, and

wherein the gate electrode and the source and drain electrodes comprise aluminum.

17. An image sensor according to claim 16, wherein the semiconductor layer is crystalline semiconductor layer.

18. An image sensor according to claim 16, wherein the semiconductor layer is polycrystalline semiconductor layer.

35. An image sensor according to claim 16, wherein the inert gas element is an argon element.

19. An image sensor comprising:

a substrate comprising plastic;

a gate electrode over the substrate comprising plastic;

a gate insulating film comprising silicon oxide over the gate electrode;

a semiconductor layer over the gate insulating film, wherein the semiconductor layer comprises a P-type source region and a P-type drain region; and

source and drain electrodes over the semiconductor layer,

wherein the gate insulating film comprises fluorine and the proportion of fluorine/silicon in the gate insulating film is 5 atom % or less,

wherein the gate insulating film comprises an inert gas element, and

wherein the gate electrode and the source and drain electrodes comprise aluminum.

20. An image sensor according to claim 19, wherein the semiconductor layer is crystalline semiconductor layer.

21. An image sensor according to claim 19, wherein the semiconductor layer is polycrystalline semiconductor layer.

36. An image sensor according to claim 19, wherein the inert gas element is an argon element.

22. A semiconductor integrated circuit comprising:

a substrate comprising plastic;

a gate electrode over the substrate comprising plastic;

a gate insulating film comprising silicon oxide over the gate electrode;

a semiconductor layer over the gate insulating film; and

source and drain electrodes over the semiconductor layer,

wherein the gate insulating film comprises fluorine and the proportion of fluorine/silicon in the gate insulating film is 5 atom % or less,

wherein the gate insulating film comprises an inert gas element, and

wherein the gate electrode and the source and drain electrodes comprise aluminum.

23. A semiconductor integrated circuit according to claim 22, wherein the semiconductor layer is crystalline semiconductor layer.

24. A semiconductor integrated circuit according to claim 22, wherein the semiconductor layer is polycrystalline semiconductor layer.

37. A semiconductor integrated circuit according to claim 22, wherein the inert gas element is an argon element.

25. A semiconductor integrated circuit comprising:

a substrate comprising plastic;

a gate electrode over the substrate comprising plastic;

a gate insulating film comprising silicon oxide over the gate electrode;

a semiconductor layer over the gate insulating film, wherein the semiconductor layer comprises a N-type source region and a N-type drain region; and

source and drain electrodes over the semiconductor layer,

wherein the gate insulating film comprises fluorine and the proportion of fluorine/silicon in the gate insulating film is 5 atom % or less,

wherein the gate insulating film comprises an inert gas element, and

wherein the gate electrode and the source and drain electrodes comprise aluminum.

26. A semiconductor integrated circuit according to claim 25, wherein the semiconductor layer is crystalline semiconductor layer.

27. A semiconductor integrated circuit according to claim 25, wherein the semiconductor layer is polycrystalline semiconductor layer.

38. A semiconductor integrated circuit according to claim 25, wherein the inert gas element is an argon element.

28. A semiconductor integrated circuit comprising:

a substrate comprising plastic;

a gate electrode over the substrate comprising plastic;

a gate insulating film comprising silicon oxide over the gate electrode;

a semiconductor layer over the gate insulating film, wherein the semiconductor layer comprises a P-type source region and a P-type drain region; and

source and drain electrodes over the semiconductor layer,

wherein the gate insulating film comprises fluorine and the proportion of fluorine/silicon in the gate insulating film is 5 atom % or less,

wherein the gate insulating film comprises an inert gas element, and

wherein the gate electrode and the source and drain electrodes comprise aluminum.

29. A semiconductor integrated circuit according to claim 28, wherein the semiconductor layer is crystalline semiconductor layer.

30. A semiconductor integrated circuit according to claim 28, wherein the semiconductor layer is polycrystalline semiconductor layer.

39. A semiconductor integrated circuit according to claim 28, wherein the inert gas element is an argon element.