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Integrated circuit which disables writing circuitry to memory when the power drops below a power threshold predetermined and controlled by the processor

  • US 7,302,592 B2
  • Filed: 12/02/2003
  • Issued: 11/27/2007
  • Est. Priority Date: 12/02/2002
  • Status: Expired due to Fees
First Claim
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1. An integrated circuit comprising a processor, non-volatile memory, an input for receiving power from a power supply and a power detection unit, wherein the integrated circuit is configured to enable multi-word writes to the non-volatile memory, the processor being configured to:

  • control and trim teh amount of power supplied to the input to predetermine a threshold at which operation of the integrated circuit is established; and

    the power detection unit being configured to;

    monitor a quality of power supplied to the input;

    in the event the quality of the power drops below the predetermined threshold, preventing subsequent words in any multi-word write currently being performed from being written to the memory.

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