Adaptive fault diagnosis of compressed test responses
First Claim
1. A computer-implemented method of diagnosing faults in a circuit-under-test, comprising:
- receiving one or more signatures that indicate the presence of one or more errors in one or more corresponding compressed test responses resulting from the application of at least one test pattern applied to a circuit-under-test;
identifying scan cells in the circuit-under-test that caused the errors in the one or more compressed test responses by analyzing the one or more signatures, wherein the act of analyzing comprises selecting a scan cell candidate that potentially caused an error in a compressed test response based at least partially on a weight value associated with the scan cell candidate and indicative of the likelihood that the scan cell candidate caused the error in the compressed test response; and
storing a list of the scan cells in the circuit-under-test that caused the errors.
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Abstract
Methods, apparatus, and systems for diagnosing failing scan cells from compressed test responses are disclosed herein. For example, in one nonlimiting exemplary embodiment, one or more signatures are received that indicate the presence of one or more errors in one or more corresponding compressed test responses. Scan cells in the circuit-under-test that caused the errors are identified by analyzing the signatures. In this exemplary embodiment, the analysis includes selecting a scan cell candidate that potentially caused an error in a compressed test response based at least partially on a weight value associated with the scan cell candidate, the weight value being indicative of the likelihood that the scan cell candidate caused the error. Tangible computer-readable media comprising computer-executable instructions for causing a computer to perform any of the disclosed methods are also provided. Tangible computer-readable media comprising lists of failing scan cells identified by any of the disclosed methods are also provided.
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Citations
28 Claims
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1. A computer-implemented method of diagnosing faults in a circuit-under-test, comprising:
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receiving one or more signatures that indicate the presence of one or more errors in one or more corresponding compressed test responses resulting from the application of at least one test pattern applied to a circuit-under-test; identifying scan cells in the circuit-under-test that caused the errors in the one or more compressed test responses by analyzing the one or more signatures, wherein the act of analyzing comprises selecting a scan cell candidate that potentially caused an error in a compressed test response based at least partially on a weight value associated with the scan cell candidate and indicative of the likelihood that the scan cell candidate caused the error in the compressed test response; and storing a list of the scan cells in the circuit-under-test that caused the errors. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A computer-implemented method, comprising:
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identifying one or more failing scan cells of a circuit-under-test from signatures indicative of one or more errors in corresponding compressed test responses received from a feedback-free compactor coupled to the circuit-under-test, the act of identifying comprising, selecting one or more scan cell candidates from a set of scan cell candidates, wherein information about one or more previously identified failing scan cells at least partially determines which of the one or more scan cell candidates are selected, determining whether the selected one or more scan cell candidates justify the one or more errors in a respective signature, and storing scan cell candidates determined to justify the one or more errors in the respective signature in a solution set of one or more failing scan cells associated with the respective signature. - View Dependent Claims (14, 15, 16, 17, 18, 19)
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20. A method, comprising:
as part of a fault diagnosis process, identifying a value in a compressed test response that indicates that an error was captured in at least one scan cell of a circuit-under-test upon application of a test pattern; selecting a scan cell candidate from a set of scan cells known to affect the value, the selection being based at least partially on at least one of the following criteria;
(a) whether the scan cell candidate is known to have captured errors upon application of other test patterns;
(b) whether the scan cell candidate is located in a scan chain known to have captured errors upon application of other test patterns;
or (c) the number of error bits in the error signature that are determined in part by scan cells output during the same time period as the scan cell candidate; anddetermining whether the scan cell candidate at least partially explains the error in the compressed test response. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28)
Specification