High temperature microelectromechanical (MEM) devices and fabrication method

• US 7,303,935 B2
• Filed: 09/08/2005
• Issued: 12/04/2007
• Est. Priority Date: 09/08/2005
• Status: Active Grant

• Current Assignee: Teledyne Scientific & Imaging, LLC (Teledyne Technologies Incorporated)
• Original Assignee: Teledyne Licensing, LLC
• Inventors: DeNatale, Jeffrey F., Stupar, Philip A., Borwick, Robert L. III
• Primary Examiner(s): Mulpuri; Savitri
• Application Number:
  US11/222,721
• Publication Number:
  US 20070054433A1
• Time in Patent Office: 817 Days
• Field of Search: 438 48- 55, 438/107, 438455-459, 216/2, 257414-417, 73/540.2, 310/309
• US Class Current: 438/48
• CPC Class Codes: B81C 1/0069 Thermal properties, e.g. improve thermal insulation
• CPC Class Codes: B81C 2203/032 Gluing

Abstract

A microelectromechanical (MEM) device per the present invention comprises a semiconductor wafer—typically an SOI wafer, a substrate, and a high temperature bond which bonds the wafer to the substrate to form a composite structure. Portions of the composite structure are patterned and etched to define stationary and movable MEM elements, with the movable elements being mechanically coupled to the stationary elements. The high temperature bond is preferably a mechanical bond, with the wafer and substrate having respective bonding pads which are aligned and mechanically connected to form a thermocompression bond to effect the bonding. A metallization layer is typically deposited on the composite structure and patterned to provide electrical interconnections for the device. The metallization layer preferably comprises a conductive refractory material such as platinum to withstand high temperature environments.

Claims

1. A method of fabricating a microelectromechanical (MEM) device having a stationary element and a movable element displaceable relative to the stationary element, comprising:

providing a silicon-on-insulator (SOI) wafer which includes a silicon handle layer and a silicon device layer;

patterning one or more bonding pads on said wafer;

providing a substrate;

patterning one or more bonding pads on said substrate such that said substrate'"'"'s bonding pads can be aligned with said wafer'"'"'s bonding pads;

etching a recessed area into said substrate;

aligning said wafer'"'"'s bonding pads with said substrate'"'"'s bonding pads;

mechanically connecting the bonding pads of said wafer and substrate to produce a thermocompression bond which bonds said wafer and substrate together to form a composite structure;

underfilling gaps in said composite structure with a curable organic sacrificial material to provide mechanical support;

removing said silicon handle layer from the SOI wafer to expose said silicon device layer;

patterning and etching portions of said composite structure to define said stationary and movable elements such that said movable element is mechanically coupled to said stationary element;

depositing, patterning and etching one or more metallization layers on said composite structure to provide electrical interconnections for said MEM device, said metallization layers comprising a conductive refractory material; and

etching away said organic sacrificial layer to release said movable element.

2. The method of claim 1, wherein said bonding pads are gold bonding pads and said thermocompression bond is an Au—

Au thermocompression bond.

3. The method of claim 1, wherein said organic underfill material is selected from a group consisting of thermally-cured epoxy, UV-cured epoxy, polymide, or BCB.

4. The method of claim 1, wherein said device layer is etched using a deep-reactive ion etch (DRIE).