Active matrix substrate

• US 7,304,351 B2
• Filed: 09/18/2005
• Issued: 12/04/2007
• Est. Priority Date: 06/13/2005
• Status: Active Grant

• Current Assignee: AU Optronics Corporation
• Original Assignee: AU Optronics Corporation
• Inventors: Lu, Chao-Liang, Liu, Po-Yuan, Huang, Shu-Ming
• Primary Examiner(s): Cao; Phat X.
• Application Number:
  US11/162,649
• Publication Number:
  US 20060278929A1
• Time in Patent Office: 807 Days
• Field of Search: 257/360, 257/355, 257/E33.064
• US Class Current: 257/355
• CPC Class Codes: G02F 1/136204 Arrangements to prevent high voltage or static electricity failures
• CPC Class Codes: H01L 27/0248 for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
• CPC Class Codes: H01L 27/105 including field-effect components
• CPC Class Codes: H01L 29/788 with floating gate H01L29/78391 takes precedence
• CPC Class Codes: H10B 69/00 Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Abstract

An active matrix substrate is provided, including a substrate, a plurality of pixel units, a static releasing conductive line and an ESD protection circuit, wherein the substrate has an active area and a peripheral area adjacent to each other. The pixel units are arranged in the active area in an array, and the static releasing conductive line is disposed in the peripheral area of the substrate. The ESD protection circuit is also disposed in the peripheral area of the substrate, being electrically connected between the pixel units and the static releasing conductive line. The ESD protection circuit includes a protection ring and a static consumption device, wherein the protection ring is disposed in a peripheral area of the substrate and the static consumption device has a floating gate, the static consumption device being electrically connected between the ESD protection circuit and the static releasing conductive line.

Claims

1. An active matrix substrate, comprising:

a substrate comprising an active area and a peripheral area, the active area and the peripheral area being adjacent to each other;

a plurality of pixel units arranged in the active area in an array;

a static releasing conductive line disposed in the peripheral area of the substrate; and

an ESD protection circuit disposed in the peripheral area of the substrate, and electrically connected between the pixel units and the static releasing conductive line, wherein the ESD protection circuit comprises;

a protection ring disposed in a peripheral area of the substrate, wherein the protection ring comprises an outer short ring and an inner short ring disposed between the pixel units and the outer short ring; and

a static consumption device having at least one floating gate, wherein the static consumption device is electrically connected between the outer short ring and the static releasing conductive line, and the static consumption device is disposed adjacent to the outer short ring.

2. The active matrix substrate according to claim 1, wherein the pixel units comprise:

a plurality of scan lines;

a plurality of data lines;

a plurality of active devices electrically connected with the corresponding scan lines and data lines respectively; and

a plurality of pixel electrodes electrically connected with the corresponding active devices respectively.

3. The active matrix substrate according to claim 1, wherein the static consumption device is electrically connected with the outer short ring and the inner short ring.

4. The active matrix substrate according to claim 1, wherein the static consumption device is electrically connected with the outer short ring or the inner short ring.

5. The active matrix substrate according to claim 1, wherein the outer short ring comprises:

a first conductive line; and

a plurality of first protection device electrically connected with the static consumption device via the first conductive line.

6. The active matrix substrate according to claim 5, wherein the first protection device comprises diodes, TFTs or a combination thereof.

7. The active matrix substrate according to claim 5, wherein the resistance of the static consumption device is less than the resistance of a first protection device.

8. The active matrix substrate according to claim 1, wherein the inner short ring comprises:

a second conductive line; and

a plurality of second protection device electrically connected with the static consumption device via the second conductive line.

9. The active matrix substrate according to claim 8, wherein the second protection device comprises diodes, TFTs or a combination thereof.

10. The active matrix substrate according to claim 8, wherein the resistance of the static consumption device is less than the resistance of a second protection device.

11. The active matrix substrate according to claim 1, wherein the static consumption device comprises TFTs, diodes, capacitors or a combination thereof.

12. The active matrix substrate according to claim 1, wherein the static consumption device comprises:

a first metal layer;

an insulating layer disposed substantially over the first metal layer;

a semiconductive layer disposed substantially over the insulating layer; and

a second metal layer disposed substantially over the semiconductive layer.