Semiconductor device including a vertical field effect transistor, having trenches, and a diode

• US 7,307,313 B2
• Filed: 08/18/2005
• Issued: 12/11/2007
• Est. Priority Date: 09/24/2004
• Status: Active Grant

• Current Assignee: DENSO Corporation, Hitachi, Ltd.
• Original Assignee: DENSO Corporation, Hitachi, Ltd.
• Inventors: Ohyanagi, Takasumi, Watanabe, Atsuo, Sakakibara, Toshio, Yamamoto, Tsuyoshi, Nakamura, Hiroki, Malhan, Rajesh Kumar
• Primary Examiner(s): Lee, Eugene
• Application Number:
  US11/206,212
• Publication Number:
  US 20060076613A1
• Time in Patent Office: 845 Days
• Field of Search: 257328-330, 257/77, 257/577, 257/E29.118
• US Class Current: 257/330
• CPC Class Codes: H01L 29/1066 Gate region of field-effect devices with PN junction gate
• CPC Class Codes: H01L 29/7722 using static field induced regions, e.g. SIT, PBT
• CPC Class Codes: H01L 29/8083 Vertical transistors SIT H01L29/7722

Abstract

A semiconductor device includes (a) a vertical field effect transistor, the vertical field effect transistor including a drain electrode formed on a first surface of a first conductivity type of a semiconductor, a pair of first trenches formed from a second surface of the semiconductor, control regions of a second conductivity type formed respectively along the first trenches, a source region of the first conductivity type formed along the second surface of the semiconductor between the first trenches, a source electrode joined to the source region, and a gate electrode adjacent to the control regions, (b) a pair of second trenches formed from the second surface of the semiconductor independently of the field effect transistor, (c) control regions of the second conductivity type formed along the second trenches, and (d) a diode having a junction formed on the second surface between the second trenches.

Claims

1. A semiconductor device comprising:

(a) a vertical field effect transistor, said vertical field effect transistor comprising;

a drain electrode formed on a first surface of a first conductivity type of a semiconductor;

a pair of first trenches formed from a second surface of the semiconductor;

control regions of a second conductivity type formed respectively along said first trenches;

a source region of the first conductivity type formed along the second surface of the semiconductor between said first trenches;

a source electrode joined to said source region; and

a gate electrode adjacent to said control regions,

said semiconductor device further comprising;

(b) a pair of second trenches formed from the second surface of the semiconductor, independently of said field effect transistor;

(c) control regions of the second conductivity type formed along said second trenches; and

(d) a diode having a junction formed on the second surface between said second trenches.

2. A semiconductor device according to claim 1, wherein the junction of said diode is a hetero junction between silicon carbide and polycrystalline silicon, a p-n junction or a Schottky junction.

3. A semiconductor device according to claim 1, further comprising a punch-through stopper layer of the first conductivity type formed along the second surface of the semiconductor between said field effect transistor and said diode.

4. A semiconductor device comprising:

(a) a vertical field effect transistor, said vertical field effect transistor comprising;

a drain electrode formed on a first surface of a first conductivity type of a semiconductor;

a pair of first trenches formed from a second surface of the semiconductor;

control regions of a second conductivity type formed respectively along said first trenches;

a source region of the first conductivity type formed along the second surface of the semiconductor between said first trenches;

a source electrode joined to said source region; and

a gate electrode adjacent to said control regions,

said semiconductor device further comprising;

(b) a pair of second trenches formed from the second surface of the semiconductor, independently of said field effect transistor;

(c) control regions of the second conductivity type formed along said second trenches;

(d) a cathode layer of the first conductivity type formed along the second surface between said second trenches; and

(e) a hetero junction diode including polycrystalline silicon of the second conductivity type in contact with said cathode layer.

5. A semiconductor device according to claim 4, further comprising a punch-through stopper layer of the first conductivity type formed along the second surface of the semiconductor between said field effect transistor and said diode.

6. A silicon carbide semiconductor device comprising:

(a) a vertical field effect transistor, said vertical field effect transistor comprising;

a substrate of a first conductivity type having a low impurity concentration and a band gap of at least 2.0 eV;

a first layer formed along a first surface of said substrate, said first layer being lower in resistance than said substrate;

a drain electrode formed on a surface of said substrate;

first trenches formed from a surface of said first layer;

a second region of the first conductivity type formed in said first layer so as to come in contact with said first trenches;

a source electrode joined to said second region;

control regions of a second conductivity type formed respectively along said first trenches; and

a gate electrode adjacent to said control regions,

said semiconductor device further comprising;

(b) a pair of second trenches formed in said first layer, independently of said field effect transistor;

(c) control regions of the second conductivity type formed along said second trenches;

(d) a cathode region of the first conductivity type formed in said first layer between said second trenches; and

(e) a hetero junction diode including polycrystalline silicon of the second conductivity type in contact with said cathode region.

7. A silicon carbide semiconductor device according to claim 6, further comprising a punch-through stopper layer of the first conductivity type formed in said first layer between said field effect transistor and said diode.