Inductive measurement system and method

• US 7,307,412 B1
• Filed: 03/10/2006
• Issued: 12/11/2007
• Est. Priority Date: 11/07/2003
• Status: Active Grant

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Broach, Michael Eugene
• Primary Examiner(s): HOLLINGTON, JERMELE M
• Application Number:
  US11/372,567
• Time in Patent Office: 641 Days
• Field of Search: None
• US Class Current: 324/117.00R
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: Y10S 323/901 Starting circuits

Abstract

A system and method measures parameters associated with an inductor such as in a switching converter. The inductance value can be determined by monitoring voltages and currents associated with the inductor when a measurement mode is activated. In one example, the measurement is provided by a signal processing system that includes an analog differentiator. In another example, the measurement is provided by a signal processing system that converts the analog measurement voltages into digital quantities that are analyzed in the digital domain. The value of the inductance value is determined by calculating of ΔV_L and ΔI_L/Δt. The saturation point in the inductance is located by measuring the change in slew rate of the inductance during the measurement mode. Average values for the inductor and the slew rate can be determined using digital techniques. Other parameters such as current limit and on-time of the inductor can be adjusted by this methodology.

Claims

1. An apparatus for measuring a parameter associated with an inductor in a circuit, the apparatus comprising:

a transistor that is arranged to selectively couple the inductor to a power source such that the inductor is charged during a charging cycle for the inductor by an input voltage associated with the power source when the transistor is active;

a voltage sense means that is arranged to sense a first signal associated with the inductor during the charging cycle for the inductor;

a current sense means that is arranged to sense a second signal;

a first calculation means that is arranged to determine a first value from the first signal, wherein the first value is associated with a time rate of change of a voltage associated with the inductor during the charging cycle for the inductor;

a second calculation means for calculating that is arranged to determine a second value from the second signal, wherein the second value is associated with a time rate of change of a current associated with the inductor; and

a third calculation means that is arranged to calculate the parameter associated with the inductor from the first value and the second value, wherein the third calculation means comprises a digital processing logic that is responsive at least one member of a group consisting of the first value, the second value, the first signal, and the second signal.

2. The apparatus of claim 1 further comprising:

an adaptive adjustment means that is arranged to change a control parameter that is associated with the circuit in response to at least one of;

the first value, the second value, and the parameter associated with the inductor.

3. The apparatus of claim 1 further comprising:

a detection means that is arranged to detect a saturation point in the inductor from at least one of;

the first value, the second value, and the parameter associated with the inductor.

4. The apparatus of claim 1 wherein the voltage sense means is arranged to sense the first signal by at least one member of a group consisting of:

measuring a voltage across the inductor, measuring a voltage across the transistor, and measuring a voltage across another transistor.

5. The apparatus of claim 1 wherein the voltage sense means corresponds to at least one member of a group consisting of:

an analog sense circuit, and an analog-to-digital converter circuit.

6. The apparatus of claim 1, wherein the voltage sense means comprises an analog-to-digital converter that is configured to provide the first signal, and the first calculation means comprises a digital processing logic circuit that is arranged to determine the first value in response to the first signal.

7. The apparatus of claim 1 wherein the current sense means is arranged to sense the second signal by at least one member of a group consisting of:

measuring a voltage across another transistor, measuring a voltage across a resistor, measuring a voltage across a series combination of the other transistor and the resistor, and measuring a drain-source voltage across the other transistor.

8. The apparatus of claim 1, wherein the current sense means is at least one member of a group consisting of:

an analog sense circuit, and an analog-to-digital converter circuit.

9. The apparatus of claim 1, wherein the current sense means comprises an analog-to-digital converter that is configured to provide the second signal, and the second calculation means comprises a digital processing logic circuit that is arranged to determine the second value in response to the second signal.

10. The apparatus of claim 1, the first calculation means comprising a differentiator circuit that is arranged to sense a drain-source voltage associated with the transistor and provide a diff signal in response to the drain-source voltage.

11. The apparatus of claim 1, wherein the third calculation means comprises a digital processing logic that is arranged to calculate an average value associated with the parameter using a data history associated with at least one member of a group consisting of the first value, the second value, the first signal, and the second signal.

12. The apparatus of claim 1, the third calculation means further comprises a digital processing logic that is arranged to determine at least one member of a group consisting of:

a time rate of change associated with at least one of the first value, the second value, the first signal, the second signal, and a saturation point for the inductor based on a change in the slew rate associated with the inductor.

13. An apparatus for measuring a parameter associated with an inductor in a circuit, the apparatus comprising:

a transistor that is arranged to selectively couple the inductor to a power source such that the inductor is charged by an input voltage associated with the power source during a charging cycle for the inductor when the transistor is active;

a control circuit that is arranged to repeatedly activate the transistor such that the inductor is charged over multiple charging cycles;

at least one analog-to-digital converter circuit that is arranged to sense an inductor current and an inductor voltage during the charging cycle of the inductor to provide raw data associated with the inductor, wherein the raw data is a digital representation of the sensed inductor current and the sensed inductor voltage from the charging cycle of the inductor such that a first data signal corresponds to the digital representation of the sensed inductor voltage and a second data signal corresponds to the digital representation of the sensed inductor current;

a memory circuit that is arranged to receive and store the raw data associated with the inductor via the first data signal and the second data signal such that the raw data stored in the memory circuit digitally represents a history of the sensed inductor voltage and the sensed inductor current; and

a digital processing logic that is arranged to communicate with the memory circuit to retrieve stored data, wherein the digital processing logic circuit is further arranged to process the retrieved data for the first data signals and the second data signals to determine;

a first value from the first data signal that is associated with a time rate of change of the sensed inductor voltage from the charging cycle of the inductor, a second value form the second data signal that is associated with a time rate of change of the sensed inductor current from the charging cycle for the inductor, and parameters that characterize the inductor based on at least one member of the group consisting of the first value the second value, the first signal, and the second signal.

14. The apparatus of claim 13, wherein the digital processing logic is arranged to adjust parameters for at least one member of a group consisting of:

a current limit, a switching time in a switched-mode power supply, a switching time in a buck regulator, a switching time in a boost regulator, a filtered version of the stored data, an inductance value associated with the inductor, a resistance value associated with the inductor, an identification of an inductor type associated with the inductor, a saturation point in the inductor, a compensation adjustment that is associated with the circuit, and a measured slew rate of the inductor.

15. The apparatus of claim 13 further comprising a sense means that is arranged to determine a voltage measurement corresponding to either the inductor current or the inductor voltage during the charging cycle of the inductor.

16. The apparatus of claim 15, wherein the voltage sense means is arranged to determine the voltage measurement from at least one member of a group consisting of:

measuring a voltage across the inductor, measuring a drain-source voltage across the transistor, measuring a voltage across a resistor, measuring a voltage across another transistor, measuring a voltage across a series combination of the other transistor and the resistor, and measuring a drain-source voltage across the other transistor.

17. The apparatus of claim 13, wherein the digital processing logic is arranged to calculate an average value associated with a determined parameter using a historical analysis of the stored data.

18. The apparatus of claim 13, wherein the average value corresponds to one member of a group consisting of:

an average inductance value for the inductor, an average resistance value for the inductor, an average saturation point for the inductor, and an average slew rate for the inductor.

19. The apparatus of claim 13, wherein the digital processing logic is arranged to evaluate the stored data to identify anomalous data, and discard anomalous data from the stored data.