Sub-cycle configurable hybrid logic/interconnect circuit

• US 7,307,449 B1
• Filed: 11/07/2005
• Issued: 12/11/2007
• Est. Priority Date: 03/15/2005
• Status: Expired due to Fees

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Tabula Incorporated
• Inventors: Redgrave, Jason, Hutchings, Brad, Schmit, Herman, Teig, Steven
• Primary Examiner(s): Tan, Vibol
• Application Number:
  US11/269,168
• Time in Patent Office: 764 Days
• Field of Search: 326/38, 326/41
• US Class Current: 326/38
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H03K 19/1737 using multiplexers H03K19/1738 takes precedence
• CPC Class Codes: H03K 19/17728 Reconfigurable logic blocks, e.g. lookup tables
• CPC Class Codes: H03K 19/17736 Structural details of routing resources
• CPC Class Codes: H03K 19/17748 Structural details of configuration resources
• CPC Class Codes: H03K 19/17796 for physical disposition of blocks

Abstract

Some embodiments of the invention provide a configurable integrated circuit (“IC”). This IC includes several configurable circuits for receiving configuration data and configurably performing a set of operations based on the configuration data. It also includes several hybrid circuits. Each particular hybrid circuit can interchangeably perform as either a logic circuit or an interconnect circuit in the configurable IC.

Claims

1. A configurable integrated circuit (“

IC”

) comprising;

a plurality of configurable logic circuits, each configurable logic circuit for configurably performing a set of functions on a set of inputs; and

a plurality of configurable interconnect circuits for configurably receiving and supplying signals from and to the configurable logic circuits;

wherein a plurality of the configurable interconnect circuits are hybrid interconnect/logic circuits, wherein each of a plurality of the hybrid interconnect/logic circuits operates as a logic circuit during a plurality of cycles during the operation of the configurable IC, and operates as an interconnect circuit during a plurality of other cycles during the operation of the configurable IC.

2. The configurable IC of claim 1, wherein when a hybrid circuit acts as a logic circuit, the hybrid circuit computes a at least one logic functions.

3. The configurable IC of claim 1, wherein each hybrid interconnect/logic circuit has a set of select lines, wherein the hybrid interconnect/logic circuit operates as an interconnect circuit when it receives only configuration data at its select lines and operates as a logic circuit when it receives at least one user design signal at one of its select lines.

4. The configurable IC of claim 1, wherein the IC is a sub-cycle reconfigurable IC, wherein each hybrid interconnect/logic circuit is for configurably serving as a logic circuit or an interconnect circuit on a sub-cycle basis.

5. A reconfigurable hybrid interconnect/logic circuit for a reconfigurable integrated circuit (IC), the reconfigurable hybrid interconnect/logic circuit comprising:

a) a first switching circuit having a first input terminal set, a first output terminal set, and a first select terminal set for receiving select signals for connecting the first input and output terminal sets;

b) a second switching circuit for configurably connecting the first select terminal set to either a first data set that includes only configuration data or a second data set that includes non-configuration data, wherein the second switching circuit is for switching between the first and second data sets during the operation of the reconfigurable IC,

wherein the second switching circuit includes a third switching circuit that (i) receives both configuration and non-configuration data and (ii) performs switching between the configuration and non-configuration data based on a signal that changes during different reconfiguration cycles of the reconfiguration IC.

6. The reconfigurable hybrid interconnect/logic circuit of claim 5, wherein the second data set also includes configuration data.

7. The reconfigurable hybrid interconnect/logic circuit of claim 5 further comprising a fourth switching circuit for providing a potentially different set of select signals to the select terminals of the third switching circuit at different reconfiguration cycles of the reconfigurable IC.

8. The reconfigurable hybrid interconnect/logic circuit of claim 7, wherein the reconfigurable IC implements a design having a particular design clock, wherein the reconfigurable IC is a sub-cycle reconfigurable IC that reconfigures more than once during the particular design clock, each time the reconfigurable IC reconfigures corresponding to a particular reconfiguration period, wherein the fourth switching circuit is for providing a potentially different set of select signals to the select terminals of the third switching circuit during different reconfiguration periods during the operation of the IC.

9. The reconfigurable hybrid interconnect/logic circuit of claim 5, wherein the second switching circuit further includes a fourth switching circuit for receiving different sets of configuration data and for outputting a potentially different configuration data set at different reconfiguration cycles of the reconfigurable IC.

10. A reconfigurable hybrid interconnect/logic circuit for a reconfigurable integrated circuit (IC), the reconfigurable hybrid interconnect/logic circuit comprising:

a) a first switching circuit comprising a first input terminal set, a first output terminal set, and a first select terminal set for receiving select signals for connecting the first input and output terminal sets;

b) a second switching circuit for configurably connecting the first select terminal set to either a first data set that includes only configuration data or a second data set that includes non-configuration data, wherein the second switching circuit is for switching between the first and second data sets during the operation of the reconfigurable IC,

wherein the second switching circuit includes (i) a third switching circuit that receives both configuration and non-configuration data and (ii) a fourth switching circuit for providing a potentially different set of select signals to the select terminals of the third switching circuit at different reconfiguration cycles of the reconfigurable IC.

11. A reconfigurable hybrid interconnect/logic circuit for a reconfigurable integrated circuit (IC), the reconfigurable hybrid interconnect/logic circuit comprising:

a) a first switching circuit comprising a first input terminal set, a first output terminal set, and a first select terminal set for receiving select signals for connecting the first input and output terminal sets;

b) a second switching circuit for configurably connecting the first select terminal set to either a first data set that includes only configuration data or a second data set that includes non-configuration data, wherein the second switching circuit is for switching between the first and second data sets during the operation of the reconfigurable IC,

wherein the second switching circuit includes (i) a third switching circuit that receives both configuration and non-configuration data and (ii) a fourth switching circuit for receiving different sets of configuration data and for outputting a potentially different configuration data set at different reconfiguration cycles of the reconfigurable IC.

12. An electronic device comprising:

an integrated circuit (IC) comprising;

a plurality of configurable logic circuits, each configurable logic circuit for configurably performing a set of functions on a set of inputs; and

a plurality of configurable interconnect circuits for configurably receiving and supplying signals from and to the configurable logic circuits;

wherein a plurality of the configurable interconnect circuits are hybrid interconnect/logic circuits, wherein each of a plurality of the hybrid interconnect/logic circuits operates as a logic circuit during a plurality of cycles during the operation of the configurable IC, and operates as an interconnect circuit during a plurality of other cycles during the operation of the configurable IC.

13. The electronic device of claim 12, wherein when a hybrid circuit acts as a logic circuit, the hybrid circuit computes at least one logic function.

14. The electronic device of claim 12, wherein each hybrid interconnect/logic circuit has a set of select lines, wherein the hybrid interconnect/logic circuit operates as an interconnect circuit when it receives only configuration data at its select lines and operates as a logic circuit when it receives at least one user design signal at one of its select lines.

15. The electronic device of claim 12, wherein the IC is a sub-cycle reconfigurable IC, wherein each hybrid interconnect/logic circuit is for configurably serving as a logic circuit or an interconnect circuit on a sub-cycle basis.

16. The electronic device of claim 12 further comprising a memory for storing configuration data.

17. An electronic device comprising:

an integrated circuit (IC) comprising;

a reconfigurable hybrid interconnect/logic circuit comprising;

a) a first switching circuit comprising a first input terminal set, a first output terminal set, and a first select terminal set for receiving select signals for connecting the first input and output terminal sets;

b) a second switching circuit for configurably connecting the first select terminal set to either a first data set that includes only configuration data or a second data set that includes non-configuration data, wherein the second switching circuit is for switching between the first and second data sets during the operation of the reconfigurable IC,

wherein the second switching circuit includes a third switching circuit that (i) receives both configuration and non-configuration data and (ii) performs its switching between the configuration and non-configuration data based on a signal that changes during different reconfiguration cycles of the reconfiguration IC.

18. The electronic device of claim 17 further comprising a fourth switching circuit for providing a potentially different set of select signals to the select terminals of the third switching circuit at different reconfiguration cycles of the reconfigurable IC.

19. The electronic device of claim 17, wherein the reconfigurable IC implements a design having a particular design clock, wherein the reconfigurable IC is a sub-cycle reconfigurable IC that reconfigures more than once during the particular design clock, each time the reconfigurable IC reconfigures corresponding to a particular reconfiguration period, wherein the fourth switching circuit is for providing a potentially different set of select signals to the select terminals of the third switching circuit during different reconfiguration periods during the operation of the IC.

20. The electronic device of claim 17 further comprising a memory for storing configuration data.