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Nonvolatile semiconductor static random access memory device

  • US 7,307,872 B2
  • Filed: 12/08/2005
  • Issued: 12/11/2007
  • Est. Priority Date: 05/30/2005
  • Status: Active Grant
First Claim
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1. A nonvolatile semiconductor memory device including a plurality of data registers,wherein each of the plurality of data registers comprises:

  • a storage node;

    a pull-up driving unit adapted and configured to pull up the storage node and having a latch structure where its control terminal is cross-coupled with the storage node;

    a pull-down driving unit adapted and configured to pull down the storage node and having a latch structure where its control terminal is cross-coupled with the storage node;

    a data input/output unit adapted and configured to selectively input and output data between a bit line and the storage node depending on a voltage applied to a word line; and

    a data storing unit adapted and configured to store data of the storage node in a ferroelectric layer depending on a voltage applied to a top word line and a bottom word line or to output data that corresponds to resistance change of a float channel layer according to a polarization state of charges stored in the ferroelectric layer to the storage node and read the outputted data.

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