Timeout determination method and apparatus

• US 7,307,951 B2
• Filed: 04/17/2003
• Issued: 12/11/2007
• Est. Priority Date: 04/24/2002
• Status: Expired due to Fees

• Current Assignee: Google LLC (Alphabet Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Dittmann, Gero, Herkersdorf, Andreas
• Primary Examiner(s): Pham, Chi
• Assistant Examiner(s): Hyun, Soon D.
• Application Number:
  US10/417,258
• Publication Number:
  US 20030202482A1
• Time in Patent Office: 1,699 Days
• Field of Search: None
• US Class Current: 370/230
• CPC Class Codes: H04L 43/026 using flow identification
• CPC Class Codes: H04L 69/28 Timers or timing mechanisms used in protocols

Abstract

A method (and apparatus) for determining, in a system including an m-bit time counter, whether an event-occurrence time lies after a predetermined timeout-value, includes reading out of a time-stamp memory a stored time-stamp value, determining the time-difference between the time-stamp value and the event-occurrence time, and determining whether the time-difference is larger than the predetermined timeout-value. The event-occurrence time is represented by a subset of the bits of the m-bit time counter, the subset being determined by a plurality of parameters including any two of a lower bit-position, an upper bit-position, and a subset width. The lower bit-position is dependent on the predetermined timeout-value.

Claims

1. A method for determining in a system comprising an m-bit time counter, whether an event-occurrence time (e_tⁿ) lies after a predetermined timeout-value (t_e), said method comprising:

a stamp readout step for reading out of a time-stamp memory a stored time-stamp value (s_tⁿ);

a time-difference determination step for determining the time-difference (Δ

_tⁿ) between said time-stamp value (s_tⁿ) and said event-occurrence time (e_tⁿ); and

a timeout-determination step for determining whether said time-difference (Δ

_tⁿ) is larger than said predetermined timeout-value (t_e),

wherein said event-occurrence time (e_tⁿ) is represented by a subset of bits of the m-bit time counter, said subset being determined by a plurality of parameters, said plurality of parameters including any two of a lower bit position (w), an upper bit-position (u), and a subset width (n),

wherein (u=n+w),

wherein a predetermined timeout period comprises said predetermined timeout value (t_e) multiplied by 2^w clock cycles, and

wherein said lower bit-position (w) is predetermined and dependent on said predetermined timeout-value (t_e).

2. The method according to claim 1, further comprising a position determination step wherein said lower bit-position is calculated in dependence on a predetermined inaccuracy value (i) and on said predetermined timeout-value (t_e).

3. The method according to claim 1, further comprising:

after said stamp readout step, a stamp write step for writing said event-occurrence time (e_tⁿ) as a new time-stamp value (s_tⁿ) into said time-stamp memory.

4. The method according to claim 1, further comprising:

a wrap-correction step for correcting the time-difference (Δ

_tⁿ) when the m-bit time counter has had a counter wrap between said time-stamp value (s_tⁿ) and said event-occurrence time (e_tⁿ).

5. The method according to claim 1, further comprising:

in said time-stamp memory, storing time-stamp values (s_tⁿ) of different event flows in different memory cells.

6. A computer-readable medium comprising a program code for performing the method according to claim 1.

7. An apparatus for determining whether an event-occurrence time (e_tⁿ) lies after a predetermined timeout-value (t_e), comprising:

a time-stamp memory for storing therein a time-stamp value (s_tⁿ);

a time-difference determinator for determining a time-difference (Δ

_tⁿ) between said stored time-stamp value (s_tⁿ) and said event-occurrence time (e_tⁿ);

a time-out determinator for determining whether said time-difference (Δ

_tⁿ) is larger than said predetermined timeout-value (t_e); and

an m-bit time counter, from which a subset of n bits represents said event-occurrence time (e_tⁿ),

wherein said subset is determined by a lower bit-position (w) and an upper bit-position (u) such that (u=n+w),

wherein a predetermined timeout period comprises said predetermined timeout value (t_e) multiplied by 2^w clock cycles, and

wherein said lower bit-position (w) is predetermined and dependent on said predetermined timeout-value (t_e).

8. The apparatus according to claim 7, further comprising:

a value input for receiving said predetermined timeout-value (t_e).

9. The apparatus according to claim 7, further comprising:

an event-trigger input for receiving events and triggering, on reception of an event, a readout of said stored time-stamp value (s_tⁿ) from said time-stamp memory into said time-difference determinator.

10. The apparatus according to claim 8, further comprising:

an event-trigger input for receiving events and triggering, on reception of an event, a readout of said stored time-stamp value (s_tⁿ) from said time-stamp memory into said time-difference determinator.

11. The apparatus according to claim 7, further comprising:

a bit-position determinator for determining said lower bit-position based on said predetermined timeout-value (t_e).

12. The apparatus according to claim 8, further comprising:

a bit-position determinator for determining said lower bit-position based on said predetermined timeout-value (t_e).

13. The apparatus according to claim 7, wherein the in-bit time counter comprises a position input for receiving a value of the lower bit-position.

14. The apparatus according to claim 8, wherein the m-bit time counter comprises a position input for receiving a value of the lower bit-position.

15. A method for determining in a system comprising an m-bit time counter, whether an event-occurrence time (e_tⁿ) lies after a predetermined timeout-value (t_e), said method comprising:

determining a time-difference (Δ

_tⁿ) between a time-stamp value (s_tⁿ) and said event-occurrence time (e_tⁿ); and

determining whether said time-difference (Δ

_tⁿ) is larger than said predetermined timeout-value (t_e),

wherein said event-occurrence time (e_tⁿ) is represented by a subset of the bits of the m-bit time counter, said subset being determined by a plurality of parameters including any two of a lower bit-position (w), an upper bit-position (u), and a subset width (n) such that (u=n+w), and

where in a predetermined timeout period comprises said predetermined timeout value (t_e) multiplied by 2^w clock cycles.

16. The method of claim 15, further comprising:

reading out of a time-stamp memory a stored time-stamp value (s_tⁿ).

17. The method of claim 15, wherein said lower bit-position (w) is predetermined and dependent on said predetermined timeout-value (t_e).

18. The method according to claim 16, further comprising:

after said reading out of said time-stamp value, writing said event-occurrence time (e_tⁿ) as a new time-stamp value (s_tⁿ) into said time-stamp memory,

wherein, in said time-stamp memory, time-stamp values (s_tⁿ) of different event flows are stored in different memory cells.

19. The method according to claim 15, further comprising:

correcting the time-difference (Δ

_tⁿ) when the m-bit time counter has had a counter wrap between said time-stamp value (s_tⁿ) and said event-occurrence time (e_tⁿ).