Multiprocessor data processing system having scalable data interconnect and data routing mechanism

• US 7,308,558 B2
• Filed: 01/07/2004
• Issued: 12/11/2007
• Est. Priority Date: 01/07/2004
• Status: Expired due to Fees

• Current Assignee: Google LLC (Alphabet Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Chung, Vicente Enrique, Arimilli, Ravi Kumar, Joyner, Jody Bern, Lewis, Jerry Don
• Primary Examiner(s): Kindred; Alford
• Assistant Examiner(s): Geib; Benjamin P.
• Application Number:
  US10/752,959
• Publication Number:
  US 20050149692A1
• Time in Patent Office: 1,434 Days
• Field of Search: 712 28- 29, 712/11
• US Class Current: 712/11
• CPC Class Codes: G06F 15/17381 Two dimensional, e.g. mesh, torus

Abstract

The data interconnect and routing mechanism reduces data communication latency, supports dynamic route determination based upon processor activity level/traffic, and implements an architecture that supports scalable improvements in communication frequencies. In one application, a data processing system includes first and second processing books, each including at least first and second processing units. Each of the first and second processing units has a respective first output data bus. The first output data bus of the first processing unit is coupled to the second processing unit, and the first output data bus of the second processing unit is coupled to the first processing unit. At least the first processing unit of the first processing book and the second processing unit of the second processing book each have a respective second output data bus. The second output data bus of the first processing unit of the first processing book is coupled to the first processing unit of the second processor book, and the second output data bus of the second processing unit of the second processor book is coupled to the second processing unit of the first processor book.

Claims

1. A data processing system, comprising:

first and second processing books each including at least first and second processing units each having at least one processor core and a data controller that routes data communication, each of said first and second processing units having a respective first output data bus, said first output data bus of said first processing unit being coupled to said second processing unit for data communication therebetween and said first output data bus of said second processing unit being coupled to said first processing unit for data communication therebetween;

at least said first processing unit of said first processing book and said second processing unit of said second processing book each having a respective second output data bus, said second output data bus of said first processing unit of said first processing book being coupled to said first processing unit of said second processing book for data communication therebetween and said second output data bus of said second processing unit of said second processing book being coupled to said second processing unit of said first processing book for data communication therebetween; and

wherein the data controller in each of the first and second processing units routes data communication between processing units in accordance with a priority schema in which inbound data traffic received by a particular processing unit on a second output data bus is accorded a highest priority and routed by that particular processing unit to a destination in a non-blocking manner.

2. The data processing system of claim 1, wherein each of said first and second output data buses is unidirectional.

3. The data processing system of claim 1, and further comprising one or more address channels coupling all of said first and second processing units.

4. The data processing system of claim 1, wherein said data controller within said first processing unit of said second processing book selectively routes data traffic received from said second output data bus of said first processing unit of said first processing book to said first output data bus of said first processing unit of said second processing book.

12. The data processing system of claim 1, wherein:

the data controller of said first processing unit of said first processing book and the data controller of said second processing unit of said second processing book communicate control information to coordinate data communication from a processing unit within a first set consisting of said first processing unit of said first processing book and said second processing unit of said second processing book to a processing unit within a second set consisting of said second processing unit of said first processing book and said first processing unit of said second processing book.

13. The data processing system of claim 1, wherein said priority schema accords a second highest priority to inbound data traffic received by a processing unit on a first output data bus.

5. A data processing system, comprising:

a first series of M processing units, M being an integer greater than or equal to 2;

a first segmented data channel including at least M-1 data buses each coupling a respective pair of said M processing units in said first series for data communication;

a second series of N processing units, N being an integer between 2 and M inclusive;

a second segmented data channel including at least N-1 data buses each coupling a respective pair of said N processing units in said second series for data communication;

a plurality of inter-series data buses, wherein each of the inter-series data buses couples one of said N processing units in said second series with a respective one of said M processing units in said first series for data communication; and

wherein each of the M processing units and the N processing units includes a respective data controller that routes data communication in accordance with a priority schema in which inbound data traffic received by one of the M processing units on the first segmented data channel and inbound data traffic received by one of the N processing units on the second segmented data channel is accorded a highest priority and is routed to a destination in a non-blocking manner.

6. The data processing system of claim 5, wherein each of said first and second segmented data channels is unidirectional.

7. The data processing system of claim 5, and further comprising one or more address channels coupling all of said processing units within said first and second series.

8. The data processing system of claim 5, and further comprising a data controller within each processing unit regulating data communication, wherein communication controllers within processing units in said first series selectively route data traffic received from said first segmented data channel to processing units in said second series via one or more of said plurality of inter-series buses.

9. The data processing system of claim 5, wherein:

said plurality of inter-series buses comprises a plurality of first inter-series buses unidirectionally conveying data communications from processing units in said first series to processing units in said second series;

said data processing system further includes a plurality of second inter-series buses each coupling one of said N processing units in said second series with a respective one of said M processing units in said first series;

said plurality of second inter-series buses unidirectionally convey data communications from processing units in said second series to processing units in said first series.

14. The data processing system of claim 5, wherein:

a first data controller of a first processing unit of the M processing units and a second data controller of the N processing units communicate control information to coordinate data communication to a third processing unit connected to the first processing unit by a segment of the first segmented data channel and connected to the second processing unit by an inter-series bus.

15. The data processing system of claim 5, wherein said priority schema accords a second highest priority to inbound data traffic received by a processing unit on an inter-series data bus.

10. A method of data communication in a data processing system including a first series of M processing units and a second series of N processing units, wherein M and N are integers, M is at least 2, and N is between 2 and M inclusive, said method comprising:

coupling each of M-1 different pairs of said M processing units in said first series with a respective one of at least M-1 data buses forming a first segmented data channel within said data processing system;

coupling each of N-1 different pairs of said N processing units in said second series with a respective one of at least N-1 data buses forming a second segmented data channel within said data processing system;

coupling each of said N processing units in said second series with a respective one of said M processing units in said first series utilizing a respective one of a plurality of inter-series data buses; and

communicating data among said processing units in said first and second series of processing units via said first and second segmented data channels and said plurality of inter-series data buses, wherein said communicating includes each of said M processing units routing inbound data traffic received on said first segmented data channel and each of said N processing units routing inbound data traffic received on said second segmented data channel in accordance with a priority schema in which said inbound data traffic is accorded a highest priority and is routed to a destination in a non-blocking manner.

11. The method of claim 10, wherein communicating data comprises unidirectionally transferring data via said first and second segmented data channels and said plurality of inter-series data buses.

16. The method of claim 10, and further comprising:

a first data controller of a first processing unit of the M processing units and a second data controller of the N processing units communicating control information to coordinate data communication to a third processing unit connected to the first processing unit by a segment of the first segmented data channel and connected to the second processing unit by an inter-series bus.

17. The method of claim 10, wherein said priority schema accords a second highest priority to inbound data traffic received by a processing unit on an inter-series data bus.