Semiconductor device capable of preventing current flow caused by latch-up and method of forming the same
First Claim
1. A semiconductor device comprising:
- a first well connected to a pad to which an external pin is connected, the first well including a first-type diffusion region connected to a bias voltage terminal;
a second well adjacent to the first well, the second well including an insulating region having a first-type diffusion region and at least one second-type diffusion region outside the insulating region, wherein the at least one second-type diffusion region of the second well is connected to a first voltage terminal, and wherein the first-type diffusion region of the insulating region is connected to a second voltage terminal; and
a third well adjacent to the second well and including a first-type diffusion region connected to the first voltage terminal,wherein the insulating region inside the second well, the at least one second-type diffusion region of the second well, and the first-type diffusion region of the first well, constitute a bipolar junction transistor which operates in a cut-off mode to cut off current from flowing from the first well to the third well when a control voltage is applied to the second voltage terminal.
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Abstract
A semiconductor device includes first, second, and third wells. The first well is connected to a pad to which an external pin is connected and includes a first-type diffusion region that receives a well bias voltage. The second well is adjacent to the first well, and includes an insulating region and a second-type diffusion region outside the insulating region. The third well is adjacent to the second well and includes a first-type diffusion region that receives a first voltage. The insulating region inside the second well along with the first-type well diffusion region of the first well constitute a bipolar junction transistor that cuts off current flowing from the first well to the third well.
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Citations
24 Claims
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1. A semiconductor device comprising:
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a first well connected to a pad to which an external pin is connected, the first well including a first-type diffusion region connected to a bias voltage terminal; a second well adjacent to the first well, the second well including an insulating region having a first-type diffusion region and at least one second-type diffusion region outside the insulating region, wherein the at least one second-type diffusion region of the second well is connected to a first voltage terminal, and wherein the first-type diffusion region of the insulating region is connected to a second voltage terminal; and a third well adjacent to the second well and including a first-type diffusion region connected to the first voltage terminal, wherein the insulating region inside the second well, the at least one second-type diffusion region of the second well, and the first-type diffusion region of the first well, constitute a bipolar junction transistor which operates in a cut-off mode to cut off current from flowing from the first well to the third well when a control voltage is applied to the second voltage terminal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A semiconductor device comprising:
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a first N-well connected to a pad to which an external pin is connected, the first N-well including an N-type diffusion region connected to a bias voltage terminal, and a P-type diffusion region formed in the vicinity of the pad; a first P-well adjacent to the first N-well, the first P-well including an insulating region and at least one P-type diffusion region outside the insulating region, the at least one P-type diffusion region of the first P-well outside of the insulating region is connected to a first voltage terminal; and a second N-well adjacent to the first P-well and including an N-type diffusion region connected to the first voltage terminal, wherein the insulating region is a sub-N-well embedded within said first P-well and having an N-type diffusion region connected to a second voltage terminal for receiving an off mode control voltage for preventing a latch-up current. - View Dependent Claims (13, 14, 15, 16, 17, 18)
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19. A method of forming a semiconductor device comprising:
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forming a first well connected to a pad to which an external pin is connected, the first well including a first-type diffusion region connected to a bias voltage terminal; forming a second well adjacent to the first well, the second well including an insulating region having a first-type diffusion region and at least one second-type diffusion region outside the insulating region, wherein the at least one second-type diffusion region of the second well is connected to a first voltage terminal, and the first-type diffusion region of the insulating region is connected to a second voltage terminal; and forming a third well adjacent to the second well and including a first-type diffusion region connected to the first voltage terminal, wherein the insulating region inside the second well, the at least one second-type diffusion region of the second well outside of the insulating region and the first-type diffusion region of the first well constitute a bipolar junction transistor which operates in a cut-off mode to cut off current flowing from the first well to the third well when a control voltage is applied to the second voltage terminal. - View Dependent Claims (20, 21, 22, 23, 24)
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Specification