Iterative decoder employing multiple external code error checks to lower the error floor

• US 7,310,768 B2
• Filed: 07/16/2004
• Issued: 12/18/2007
• Est. Priority Date: 01/28/2000
• Status: Expired due to Fees

• Current Assignee: MaxLinear Communications, LLC (f/k/a Entropic Communications, LLC) (Maxlinear Incorporated)
• Original Assignee: Conexant Systems Incorporated (Synaptics Incorporated)
• Inventors: Eidson, Donald Brian, Krieger, Abraham, Murali, Ramaswamy
• Primary Examiner(s): Ton; David
• Application Number:
  US10/892,738
• Publication Number:
  US 20040261002A1
• Time in Patent Office: 1,250 Days
• Field of Search: 714/755, 714/786, 714/792, 375/136, 375/233
• US Class Current: 714/786
• CPC Class Codes: H03M 13/09 Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
• CPC Class Codes: H03M 13/15 Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes H03M13/17 takes precedence
• CPC Class Codes: H03M 13/2936 comprising an outer Reed-Solomon code and an inner convolutional code
• CPC Class Codes: H03M 13/2948 Iterative decoding H03M13/2957 takes precedence
• CPC Class Codes: H03M 13/2972 Serial concatenation using convolutional component codes
• CPC Class Codes: H03M 13/3776 using a re-encoding step during the decoding process
• CPC Class Codes: H03M 13/3994 using state pinning or decision forcing, i.e. the decoded sequence is forced through a particular trellis state or a particular set of trellis states or a particular decoded symbol
• CPC Class Codes: H04L 1/005 Iterative decoding, including iteration between signal detection and decoding operation
• CPC Class Codes: H04L 1/0054 Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
• CPC Class Codes: H04L 1/0061 Error detection codes
• CPC Class Codes: H04L 1/0065 Serial concatenated codes
• CPC Class Codes: H04L 1/0066 Parallel concatenated codes

Abstract

Iterative decoder employing multiple external code error checks to lower the error floor and/or improve decoding performance. Data block redundancy, sometimes via a cyclic redundancy check (CRC) or Reed Solomon (RS) code, enables enhanced iterative decoding performance. Improved decoding performance is achieved during interim iterations before the final iteration. A correctly decoded CRC block, indicating a decoded segment is correct with a high degree of certainty, assigns a very high confidence level to the bits in this segment and is fed back to inner and/or outer decoders (with interleaving, when appropriate) for improved iterative decoding. High confidence bits may be scattered throughout inner decoded frames to influence other bit decisions in subsequent iterations. Turbo decoders typically operate relatively well at regions where the BER is high; the invention improves iterative decoder operation at lower BERs, lowering the ‘BER floor’ that is sometimes problematic with conventional turbo decoders.

Claims

1. An iterative decoder, comprising:

an internal code decoder operable to perform iterative decoding of a data block; and

an external code decoder capable of supplying a feedback signal to the internal decoder wherein the feedback signal is used to influence selective decisions during subsequent decoding iterations of the data block, wherein the data block comprises a turbo code data block comprising a plurality of sub-blocks; and

the external code decoder performs decoding on a sub-block basis.

2. The iterative decoder of claim 1, wherein the external code decoder performs error detection processing on one of the sub-blocks within the plurality of sub-blocks.

3. The iterative decoder of claim 2, wherein the external code decoder performs error correction processing on the one of the sub-blocks within the plurality of sub-blocks.

4. An iterative decoder, comprising:

an internal code decoder operable to perform iterative decoding of a data block; and

an external code decoder capable of supplying a feedback signal to the internal decoder wherein the feedback signal is used to influence selective decisions during subsequent decoding iterations of the data block, wherein the data block comprises a turbo code data block;

the external code decoder further comprises an external code interleaver and an external code deinterleaver; and

each of the external code interleaver and the external code deinterleaver is operable to process a plurality of data having a span that is as long as a span of the turbo code data block.

5. An iterative decoder method, comprising:

performing iterative internal decoding of a data block; and

feeding back external decoding information to influence selective decisions during subsequent internal decoding iterations of the data block;

wherein the data block comprises a turbo code data block comprising a plurality of sub-blocks; and

further comprising performing decoding on a sub-block basis; and

performing error detection processing on one of the sub-blocks within the plurality of sub-blocks.

6. An iterative decoder method, comprising:

performing iterative internal decoding of a data block; and

feeding back external decoding information to influence selective decisions during subsequent internal decoding iterations of the data block, wherein the data block comprises a turbo code data block comprising a plurality of sub-blocks; and

further comprising performing decoding on a sub-block basis; and

performing error detection processing on one of the sub-blocks within the plurality of sub-blocks.

7. An iterative decoder, comprising:

means for performing iterative decoding of a data block; and

means for supplying a feedback signal to the internal decoder wherein the feedback signal is used to influence selective decisions during subsequent decoding iterations of the data block, wherein the data block comprises a turbo code data block comprising a plurality of sub-blocks; and

the means for performing external code decoding performs decoding on a sub-block basis.

8. The iterative decoder of claim 7, wherein the means for performing external code decoding performs error detection processing on one of the sub-blocks within the plurality of sub-blocks.

9. The iterative decoder of claim 8, wherein the means for performing external code decoding performs error correction processing on the one of the sub-blocks within the plurality of sub-blocks.

10. An iterative decoder, comprising:

means for performing iterative decoding of a data block; and

means for supplying a feedback signal to the internal decoder wherein the feedback signal is used to influence selective decisions during subsequent decoding iterations of the data block, wherein

the data block comprises a turbo code data block;

the means for performing external code decoding further comprises means for performing external code interleaving and means for performing external code deinterleaving; and

each of the means for performing external code interleaving and the means for performing external code deinterleaving is operable to process a plurality of data having a span that is as long as a span of the turbo code data block.

11. An iterative decoder, comprising:

an internal code decoder operable to perform iterative decoding of a data block; and

an external code decoder capable of supplying a feedback signal to the internal decoder wherein the feedback signal is used to influence selective decisions during subsequent decoding iterations of the data block;

wherein the data block comprises a turbo code data block comprising a plurality of sub-blocks;

the external code decoder performs decoding on a sub-block basis;

the external code decoder performs error detection processing on one of the sub-blocks within the plurality of sub-blocks; and

the external code decoder performs error correction processing on the one of the sub-blocks within the plurality of sub-blocks.

12. An iterative decoder, comprising:

an internal code decoder operable to perform iterative decoding of a data block; and

an external code decoder capable of supplying a feedback signal to the internal decoder wherein the feedback signal is used to influence selective decisions during subsequent decoding iterations of the data block;

wherein the data block comprises a turbo code data block;

the external code decoder further comprises an external code interleaver and an external code deinterleaver; and

each of the external code interleaver and the external code deinterleaver is operable to process a plurality of data having a span that is as long as a span of the turbo code data block.