Semiconductor device having antenna connection electrodes

• US 7,312,528 B2
• Filed: 02/17/2004
• Issued: 12/25/2007
• Est. Priority Date: 02/18/2003
• Status: Expired due to Fees

• Current Assignee: Hitachi Maxell Limited (Maxell, Ltd.)
• Original Assignee: Hitachi Maxell Limited (Maxell, Ltd.)
• Inventors: Nakayama, Osamu, Daido, Kazuhiko, Watanabe, Hiroto, Shiratsuchi, Osamu
• Primary Examiner(s): WILLIAMS, ALEXANDER O
• Application Number:
  US10/778,234
• Publication Number:
  US 20040159932A1
• Time in Patent Office: 1,407 Days
• Field of Search: 257/E23.064, 257/693, 257/784, 257/690, 257/700, 257/701, 257/728, 257723-725, 257/528, 257/532, 257/421, 257/685, 257/679, 257/24, 257/192, 257/777, 257/664, 257/668, 257/686, 257/240, 343/700.MS, 343/767, 343/895, 343/702, 343/873, 343/846, 361/720
• US Class Current: 257/728
• CPC Class Codes: H01L 2224/02166 Collar structures
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/4813 Connecting within a semiconductor or solid-state body, i.e. fly wire, bridge wire
• CPC Class Codes: H01L 2224/4847 the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00

Abstract

A semiconductor device includes first and second antenna connection electrodes placed on the periphery of a semiconductor chip, an on-chip antenna connection electrode placed in the inner area of the semiconductor chip compared to the first and second antenna connection electrodes, and an internal circuit formed in the semiconductor chip. The first and second antenna connection electrodes are connected to the internal circuit by internal lines. The on-chip antenna connection electrode is connected to the internal circuit and the second antenna connection electrode by internal lines. An on-chip antenna is connected to the second antenna connection electrode and the on-chip antenna connection electrode. An external antenna is connected to the first and second antenna connection electrodes.

Claims

1. A semiconductor device comprising:

a first electrode placed in a periphery and on an exposed upper surface of a semiconductor chip, for connection to an on-chip antenna or an external antenna;

a second electrode placed in a periphery and on the exposed upper surface of the semiconductor chip, for connection to an external antenna;

an on-chip antenna connection electrode placed in an inner area and on said exposed upper surface of the semiconductor chip compared to the first electrode and the second electrode for connection to an on-chip antenna; and

a circuit formed in the semiconductor chip,

wherein the first electrode and the second electrode are connected to the circuit by internal lines, and

the on-chip antenna connection electrode is connected to the circuit and the second electrode by internal lines.

3. The semiconductor device according to claim 1, wherein

the on-chip antenna connection electrode and the first electrode are connected to an on-chip antenna formed thereabove with an insulating layer interposed therebetween.

4. The semiconductor device according to claim 1, further comprising:

an external antenna connected to the first electrode and the second electrode.

5. The semiconductor device according to claim 1, wherein the on-chip antenna connection electrode is produced by creating an opening in an insulating layer deposited above said internal lines.

6. The semiconductor device according to claim 3, wherein the on-chip antenna connection electrode is produced by creating an opening in an insulating layer deposited above said internal lines.

7. The semiconductor device according to claim 4, wherein the on-chip antenna connection electrode is produced by creating an opening in an insulating layer deposited above said internal lines.

8. The semiconductor device according to claim 1, wherein the internal lines are formed inside the semiconductor chip.

9. The semiconductor device according to claim 3, wherein the internal lines are formed inside the semiconductor chip.

10. The semiconductor device according to claim 4, wherein the internal lines are formed inside the semiconductor chip.

11. The semiconductor device according to claim 1, wherein the on-chip antenna connection electrode is placed at a center of the semiconductor chip.

2. A semiconductor device comprising:

a first electrode placed in a periphery and on an exposed upper surface of a semiconductor chip, for connection to an on-chip antenna or an external antenna;

a second electrode placed in a periphery and on the exposed upper surface of the semiconductor chip, for connection to an external antenna;

an on-chip antenna connection electrode placed in an inner area and on said exposed upper surface of the semiconductor chip compared to the first electrode and the second electrode for connection to an on-chip antenna; and

a circuit formed in the semiconductor chip,

wherein the first electrode and the second electrode are connected to the circuit by internal lines, and

the on-chip antenna connection electrode is connected to the circuit and the second electrode by internal lines;

wherein the first electrode and the second electrode are placed near different corners of the semiconductor chip.

12. A semiconductor device comprising:

a first electrode placed in a periphery and on an exposed upper surface of a semiconductor chip, for connection to an on-chip antenna or an external antenna;

a second electrode placed in a periphery and on the exposed upper surface of the semiconductor chip, for connection to an external antenna;

an on-chip antenna connection electrode placed in an inner area and on said exposed upper surface of the semiconductor chip compared to the first electrode and the second electrode for connection to an on-chip antenna; and

a circuit formed in the semiconductor chip,

wherein the first electrode and the second electrode are connected to the circuit by internal lines, and

the on-chip antenna connection electrode is connected to the circuit and the second electrode by internal lines;

wherein a principal surface of the on-chip antenna connection electrode is smaller than that of the first electrode and the second electrode.