System and method for controlling output-timing parameters of power converters

• US 7,315,156 B2
• Filed: 10/31/2005
• Issued: 01/01/2008
• Est. Priority Date: 03/14/2003
• Status: Expired due to Term

• Current Assignee: Bel Power Solutions Inc.
• Original Assignee: Power-One Incorporated (ABB Limited)
• Inventors: Chapuis, Alain
• Primary Examiner(s): BERHANE, ADOLF D
• Application Number:
  US11/264,057
• Publication Number:
  US 20060061214A1
• Time in Patent Office: 792 Days
• Field of Search: 323/282, 323/318, 323/351, 714/22
• US Class Current: 323/282
• CPC Class Codes: H02J 1/08 Three-wire systems; Systems having more than three wires
• CPC Class Codes: H02J 1/082 Plural DC voltage, e.g. DC supply voltage with at least two different DC voltage levels
• CPC Class Codes: H02M 1/008 Plural converter units for generating at two or more independent and non-parallel outputs, e.g. systems with plural point of load switching regulators
• CPC Class Codes: H02M 1/08 Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters

Abstract

A system and method is provided for utilizing output-timing data to control at least one output timing parameter of a point-of-load (“POL”) regulator. Specifically, a power supply controller (“controller”) is adapted to transmit output-timing data to at least one POL regulator. In one embodiment of the present invention, each POL regulator includes an output builder, a control unit and a storage device. The control unit is adapted to store the output-timing data in the storage device. The control unit and the output builder are then adapted to produce an output having at least one output timing parameter in accordance with the output-timing data. Examples of output-timing data include sequencing data, turn-on data, turn-off data, termination data, slew-rate data, etc. For example, a POL regulator may be adapted to utilize output-timing data, or a portion thereof (e.g., slew-rate data), to generate an output having a particular slew rate. Similarly, a POL regulator may be adapted to utilize output-timing data, or a portion thereof (e.g., sequencing data, turn-on data, etc.), to determine (or calculate) a period of time to wait (e.g., delay period) before the output is generated. In other words, output-timing data can be used to produce a series of outputs in a particular order, or sequence.

Claims

1. A power control system comprising:

a controller adapted to provide output control signals;

a least one data bus operatively connected to the controller; and

at least one voltage regulator operatively connected to the at least one data bus and receiving the output control signals via the at least one data bus, the at least one voltage regulator including a control unit and a power conversion circuit, the control unit being adapted to control operation of the power conversion circuit responsive to the output control signals.

2. The power control system of claim 1, wherein the output control signals further comprise at least one command setting an output voltage of the power conversion circuit to a desired value.

3. The power control system of claim 1, wherein the output control signals further comprise at least one command setting a rate of change of an output voltage of the power conversion circuit to a desired value.

4. The power control system of claim 1, wherein the output control signals further comprise at least one command setting a turn-on delay of an output voltage of the power conversion circuit.

5. The power control system of claim 1, wherein the output control signals further comprise at least one command setting a turn-off delay of an output voltage of the power conversion circuit.

6. The power control system of claim 1, wherein the output control signals further comprise at least one multi-bit command message.

7. The power control system of claim 6, wherein the multi-bit command message includes at least an address of the at least one voltage regulator.

8. The power control system of claim 6, wherein the multi-bit command message includes a command portion and a data portion.

9. The power control system of claim 1, wherein the at least one voltage regulator further comprises a plurality of voltage regulators, the output control signals being directed to plural ones of the plurality of voltage regulators.

10. The power control system of claim 1, wherein the control unit further comprises a memory adapted to store the output control signals received from the controller.

11. The power control system of claim 10, wherein the control unit is further adapted to control operation of the power conversion circuit responsive to the output control signals stored in the memory.

12. The power control system of claim 10, wherein the output control signals further comprise at least one command setting an output voltage of the power conversion circuit to a desired value and having a slew rate defined by previously stored control signals.

13. The power control system of claim 1, wherein the at least one data bus further comprises a serial data bus.

14. The power control system of claim 1, wherein the at least one data bus further comprises a bi-directional serial data bus.

15. The power control system of claim 1, wherein the at least one data bus further comprises a two-wire serial data bus adapted for asynchronous data transmission.

16. The power control system of claim 1, wherein the at least one data bus further comprises a single-wire serial data bus adapted for synchronous data transmission.

17. The power control system of claim 1, wherein the at least one data bus further comprises a serial data bus adapted for data transmission synchronized to a clock signal.

18. The power control system of claim 1, wherein the at least one data bus is superimposed over a power bus.