Apparatus and method for multi-phase transformers

• US 7,315,463 B2
• Filed: 09/30/2004
• Issued: 01/01/2008
• Est. Priority Date: 09/30/2004
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Gardner, Donald S., Schrom, Gerhard, Hazucha, Peter, Karnik, Tanay, De, Vivek K.
• Primary Examiner(s): Vu; Bao Q.
• Application Number:
  US10/956,192
• Publication Number:
  US 20060071649A1
• Time in Patent Office: 1,188 Days
• Field of Search: 323/355, 323/361, 323/328, 323/215, 323/305, 363/148, 363153-155, 336/12, 336/15
• US Class Current: 363/148
• CPC Class Codes: H01F 2038/026 non-linear inductive arrangements for converters, e.g. with additional windings
• CPC Class Codes: H01F 27/38 Auxiliary core members; Auxiliary coils or windings
• CPC Class Codes: H01F 27/42 Circuits specially adapted for the purpose of modifying, or compensating for, electric characteristics of transformers, reactors, or choke coils circuits for controlling transformers, reactors or choke coils, for the purpose of obtaining a desired output H02P13/00; impedance networks H03H
• CPC Class Codes: H01F 37/00 Fixed inductances not covered by group H01F17/00
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel

Abstract

A method and apparatus for multi-phase transformers are described. In one embodiment, a coupled inductor topology for the multi-phase transformers comprising N primary inductors. In one embodiment, each primary inductor is coupled to one of N input nodes and a common output node. The transformer further includes N−1 secondary inductors coupled in series between one input node and the common output node. In one embodiment, the N−1 secondary inductors are arranged to couple energy from N−1 of the primary inductors to provide a common node voltage as an average of N input node voltages, wherein N is an integer greater than two. Other embodiments are described and claimed.

Claims

1. A transformer comprising:

a series-parallel coupled inductor topology of primary inductors and secondary inductors arranged to provide a common node voltage as an average of N input node voltages, wherein N is an integer greater than two, and at least two secondary inductors are coupled in series, the two secondary inductors coupled in parallel with one primary inductor.

2. The transformer of claim 1, wherein the series-parallel coupled inductor topology comprises:

N primary inductors, each primary inductor coupled to one of N input nodes and a common output node; and

N−

1 secondary inductors coupled in series between one input node and the common output node, the N−

1 secondary inductors arranged to couple energy from N−

1 of the primary inductors to provide improved droop voltage response.

3. The transformer of claim 2, wherein the N−

1 secondary inductors are coupled in parallel with one primary inductor of the Nprimary inductors to couple energy from N−

1 of the primary inductors.

4. The transformer of claim 2, wherein the N−

1 secondary inductors are arranged anti-parallel to a first primary inductor, such that the N−

1 secondary inductors are coupled in series between a first node and the common node to couple energy from N−

1 of the primary inductors to provide extra damping of a droop voltage.

5. The transformer of claim 1, wherein N equals four.

6. The transformer of claim 1, wherein the series-parallel coupled inductor topology comprises:

N primary inductors, each primary inductor coupled to one of N input nodes and a common output node; and

N groups of secondary inductors, each group of inductors including at most N−

1 secondary inductors coupled in series between one input node and the common output node, the N groups of secondary inductors arranged to couple energy from the primary inductors to provide to provide improved droop voltage response.

7. The transformer of claim 6, wherein N equals three.

8. The transformer of claim 6, wherein N equals four.

9. The transformer of claim 6, further comprising an N phase voltage coupled to each of the N input nodes.

10. The transformer of claim 1, wherein the transformer comprises a multi-phase micro-transformer.

11. A DC-DC converter comprising:

a transformer including a series-parallel coupled inductor topology of primary inductors and secondary inductors arranged to provide a common node voltage as an average of N input node voltages, wherein N is an integer greater than two, and at least two secondary inductors are coupled in series, the two secondary inductors coupled in parallel with one primary inductor;

N bridges, each bridge coupled to one transformer input node; and

a control circuit to control the N bridges to provide the common mode voltage at a transformer common node.

12. The DC-DC converter of claim 11, wherein the series-parallel coupled inductor topology comprises:

N primary inductors, each primary inductor coupled to one of N input nodes and a common output node; and

N−

1 secondary inductors coupled in series between one Input node and the common output node, the N−

1 secondary inductors arranged to couple energy from N−

1 of the primary inductors to provide improved droop voltage response.

13. The DC-DC converter of claim 11, further comprising a capacitor coupled to the transformer common node.

14. The DC-DC converter of claim 11, wherein the transformer comprises a multi-phase micro-transformer.

15. The DC-DC converter of claim 11, wherein the DC-DC converter is integrated on a processor die.

16. A machine readable medium having embodied thereon a circuit design for fabrication into a DC-DC converter which, when fabricated comprises:

a transformer including a series-parallel coupled inductor topology of primary inductors and secondary inductors arranged to provide a common node voltage as an average of N input node voltages, wherein N is an integer greater than two, and at least two secondary inductors are coupled in series, the two secondary inductors coupled in parallel with one primary inductor;

N bridges, each bridge coupled to one transformer input node; and

a control circuit to control the N bridges to provide the common mode voltage at a transformer common node.

17. The machine readable medium of claim 16, wherein the series-parallel coupled inductor topology comprises:

N primary inductors, each primary inductor coupled to one of N input nodes and a common output node; and

N−

1 secondary inductors coupled in series between one input node and the common output node, the N−

1 secondary inductors arranged to couple energy from N−

1 of the primary inductors to provide improved droop voltage response.

18. The machine readable medium of claim 16, wherein the DC-DC converter further comprising a capacitor coupled to the transformer common node.

19. The machine readable medium of claim 16, wherein the transformer comprises a multi-phase micro-transformer.

20. The machine readable medium of claim 16, wherein the DC-DC converter is integrated on a processor die.

21. A machine readable medium having embodied thereon a circuit design for fabrication into an integrated circuit which, when fabricated comprises:

a transformer including;

N primary inductors, each primary inductor coupled to one of N input nodes and a common output node, and

N−

1 secondary inductors coupled in series between one input node and the common output node, the N−

1 secondary inductors arranged to couple energy from N−

1 of the primary inductors to provide a common node voltage as an average of N input node voltages, wherein N is an integer greater than two;

N bridges, each bridge coupled to one transformer input node; and

a control circuit to control the N bridges to provide the common mode voltage at the transformer common node.

22. The machine readable medium of claim 21, wherein each of the N bridges comprises a first switch coupled to an input voltage and a second switch coupled to ground.

23. The machine readable medium of claim 21, further comprising a capacitor coupled to the transformer common node.

24. The machine readable medium of claim 21, wherein the transformer comprises a multi-phase micro-transformer.

25. The machine readable medium of claim 21, wherein the DC-DC converter is integrated on a processor die.

26. An electronic system comprising:

a heat sink;

a heat spreader coupled to the heat sink;

a processor die coupled to the heat spreader;

a DC-DC converter, comprising;

a transformer including;

N primary inductors, each primary inductor coupled to one of N input nodes and a common output node; and

N−

1 secondary inductors coupled in series between one input node and the common output node, the N−

1 secondary inductors arranged to couple energy from N−

1 of the primary inductors to provide a common node voltage as an average of N input node voltages, wherein N is an integer greater than two;

N bridges, each bridge coupled to one transformer input node, and

a control circuit to control the N bridges to provide the common mode voltage at the transformer, node;

an interposer coupled to the processor die; and

a memory system coupled to the processor die.

27. The electronic system of claim 26, wherein the DC-DC converter is integrated on the processor die.

28. The electronic system of claim 26, wherein the DC-DC converter comprises:

a DC-DC converter die coupled between the processor die and the interposer.

29. The electronic system of claim 26, further comprising a capacitor coupled to the transformer common node.

30. The electronic system of claim 26, wherein the transformer comprises a multi-phase micro-transformer.