Adjustable data loading circuit with dynamic test mode switching for testing programmable integrated circuits
First Claim
1. A programmable integrated circuit, comprising:
- programmable logic;
a plurality of rows of programmable elements that are loaded with test configuration data from a tester to program the programmable logic;
a plurality of pins, each of which receives the test configuration data from the tester;
a first bus that receives the test configuration data from the tester, wherein the first bus has a plurality of lines, each of which is provided with the test configuration data from a respective one of the plurality of pins;
a second bus having a plurality of lines that provides the test configuration data to the programmable elements, wherein each of the rows of programmable elements receives test configuration data from each of the lines in the second bus; and
a test configuration data loading circuit with dynamic mode switching that routes the test configuration data from the first bus to the second bus.
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Abstract
Methods and apparatus for testing programmable integrated circuits are provided. Programmable integrated circuits include programmable elements that are loaded with configuration data to program programmable logic to perform a custom logic function. The programmable integrated circuits receive test configuration data from a tester to program the programmable logic into a test configuration. After the programmable integrated circuit has been placed into the test configuration by loading the test configuration data, test vectors are applied to the programmable integrated circuit to evaluate its performance. Test configuration data loading circuits are used in the programmable integrated circuits to control how the test configuration data is loaded into the programmable elements. When the adjustable circuits are placed in a low bandwidth configuration, relatively few input lines are used to load the test configuration data. When the adjustable circuits are placed in a high bandwidth configuration, test data can be loaded quickly.
10 Citations
12 Claims
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1. A programmable integrated circuit, comprising:
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programmable logic; a plurality of rows of programmable elements that are loaded with test configuration data from a tester to program the programmable logic; a plurality of pins, each of which receives the test configuration data from the tester; a first bus that receives the test configuration data from the tester, wherein the first bus has a plurality of lines, each of which is provided with the test configuration data from a respective one of the plurality of pins; a second bus having a plurality of lines that provides the test configuration data to the programmable elements, wherein each of the rows of programmable elements receives test configuration data from each of the lines in the second bus; and a test configuration data loading circuit with dynamic mode switching that routes the test configuration data from the first bus to the second bus. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A programmable integrated circuit, comprising:
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programmable logic; a plurality of rows of programmable elements that are loaded with test configuration data from a tester to program the programmable logic; a plurality of pins, each of which receives the test configuration data from the tester; a plurality of first lines, wherein at least some of the first lines each receive the test configuration data from a respective one of the pins; a plurality of second lines arranged in a bus, wherein each of the rows of programmable elements receives test configuration data from each of the second lines in the bus; and time-division-multiplexing circuitry that routes the test configuration data from the first lines that have received the test configuration data to the second lines. - View Dependent Claims (8, 9, 10, 11, 12)
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Specification