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Adjustable data loading circuit with dynamic test mode switching for testing programmable integrated circuits

  • US 7,317,327 B1
  • Filed: 04/06/2007
  • Issued: 01/08/2008
  • Est. Priority Date: 01/13/2005
  • Status: Expired due to Fees
First Claim
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1. A programmable integrated circuit, comprising:

  • programmable logic;

    a plurality of rows of programmable elements that are loaded with test configuration data from a tester to program the programmable logic;

    a plurality of pins, each of which receives the test configuration data from the tester;

    a first bus that receives the test configuration data from the tester, wherein the first bus has a plurality of lines, each of which is provided with the test configuration data from a respective one of the plurality of pins;

    a second bus having a plurality of lines that provides the test configuration data to the programmable elements, wherein each of the rows of programmable elements receives test configuration data from each of the lines in the second bus; and

    a test configuration data loading circuit with dynamic mode switching that routes the test configuration data from the first bus to the second bus.

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