Reconfigurable IC that has sections running at different reconfiguration rates

• US 7,317,331 B2
• Filed: 03/15/2005
• Issued: 01/08/2008
• Est. Priority Date: 11/08/2004
• Status: Expired due to Fees

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Tabula Incorporated
• Inventors: Teig, Steven, Schmit, Herman, Redgrave, Jason
• Primary Examiner(s): Tan, Vibol
• Application Number:
  US11/081,877
• Publication Number:
  US 20070241780A1
• Time in Patent Office: 1,029 Days
• Field of Search: 326/40, 326/38, 326/39
• US Class Current: 326/40
• CPC Class Codes: H03K 19/17756 for partial configuration or partial reconfiguration
• CPC Class Codes: H03K 19/17758 for speeding up configuration or reconfiguration

Abstract

Some embodiments provide a reconfigurable IC that includes several sections. Each section includes several configurable circuits, each of which configurably performs a set of operations. Each section stores multiple configuration data sets for each configurable circuit. Each configuration data set for a particular configurable circuit specifies the operation that the particular configurable circuit has to perform from the circuit'"'"'s set of operations, where the configurable circuits of at least two different sections change configuration data sets at two different reconfiguration rates.

Claims

1. A reconfigurable IC comprising:

a plurality of sections comprising first and second sections,

each section including a plurality of configurable circuits,

each configurable circuit for configurably performing a set of operations;

each section storing multiple configuration data sets for each configurable circuit, each configuration data set for a particular configurable circuit specifying the operation that the particular configurable circuit has to perform from the circuit'"'"'s set of operations;

wherein the configurable circuits of the first and second sections change configuration data sets at two different reconfiguration rates;

a first clock signal for setting a reconfiguration rate for configuration data sets in the first section; and

a second clock signal for setting a reconfiguration rate for configuration data sets in the second section.

2. The reconfigurable IC of claim 1, wherein the first and second clocks are clocks globally distributed to the configurable circuits of the reconfigurable IC.

3. The reconfigurable IC of claim 2, wherein the first and second clocks define first and second clock domains within the reconfigurable IC.

4. The reconfigurable IC of claim 2, wherein the reconfigurable IC further comprises:

a) for each particular configurable circuit, configuration data supplying circuitry for supplying configuration data sets to the particular configurable circuit;

b) in the first section, at least a first local signal generator for generating signals based on the first clock to control the configuration data supplying circuitry in the first section; and

c) in the second section, at least a second local signal generator for generating signals based on the second clock to control the configuration data supplying circuitry in the second section.

5. The reconfigurable IC of claim 1, wherein the configurable circuits include configurable logic circuits each for configurably performing a set of functions, wherein a configuration data set for a configurable logic circuit specifies a function for the configurable logic circuit to perform within the configurable logic circuit'"'"'s set of functions.

6. The reconfigurable IC of claim 5, wherein the configurable circuits further include configurable interconnect circuits each for configurably performing a set of interconnect operations, wherein a configuration data set for a configurable interconnect circuit specifies an interconnect operation for the configurable interconnect circuit to perform within the configurable interconnect circuit'"'"'s set of interconnect operations.

7. The reconfigurable IC of claim 6, wherein the configurable interconnect circuits include configurable routing circuits for configurably routing signals between the configurable logic circuits.

8. The reconfigurable IC of claim 7, wherein the configurable interconnect circuits include configurable input-select interconnect circuits for configurably selecting signals that are input signals to the configurable logic circuits.

9. The reconfigurable IC of claim 1, wherein the configurable circuits includes configurable interconnect circuits each for configurably performing a set of interconnect operations, wherein a configuration data set for a configurable interconnect circuit specifies an interconnect operation for the configurable interconnect circuit to perform within the configurable interconnect circuit'"'"'s set of interconnect operations.

10. An electronic device comprising:

a reconfigurable integrated circuit (IC) comprising;

a plurality of sections,

each section including a plurality of configurable circuits,

each configurable circuit for configurably performing a set of operations;

each section storing multiple configuration data sets for each configurable circuit, each configuration data set for a particular configurable circuit specifying the operation that the particular configurable circuit has to perform from the circuit'"'"'s set of operations;

wherein the configurable circuits of the first and second sections change configuration data sets at two different reconfiguration rates;

a first clock signal for setting a reconfiguration rate for configuration data sets in the first section; and

a second clock signal for setting a reconfiguration rate for configuration data sets in the second section.

11. The electronic device of claim 10, wherein the first and second clocks are clocks globally distributed to the configurable circuits of the reconfigurable IC.

12. The electronic device of claim 11, wherein the first and second clocks define first and second clock domains within the reconfigurable IC.

13. The electronic device of claim 11, wherein the reconfigurable IC further comprises:

a) for each particular configurable circuit, configuration data supplying circuitry for supplying configuration data sets to the particular configurable circuit;

b) in the first section, at least a first local signal generator for generating signals based on the first clock to control the configuration data supplying circuitry in the first section; and

c) in the second section, at least a second local signal generator for generating signals based on the second clock to control the configuration data supplying circuitry in the second section.

14. The electronic device of claim 10, wherein the configurable circuits include configurable logic circuits each for configurably performing a set of functions, wherein a configuration data set for a configurable logic circuit specifies a function for the configurable logic circuit to perform within the configurable logic circuit'"'"'s set of functions.

15. The electronic device of claim 14, wherein the configurable circuits further include configurable interconnect circuits each for configurably performing a set of interconnect operations, wherein a configuration data set for a configurable interconnect circuit specifies an interconnect operation for the configurable interconnect circuit to perform within the configurable interconnect circuit'"'"'s set of interconnect operations.

16. The electronic device of claim 15, wherein the configurable interconnect circuits include configurable routing circuits for configurably routing signals between the configurable logic circuits.

17. The electronic device of claim 16, wherein the configurable interconnect circuits includes configurable input-select interconnect circuits for configurably selecting signals that are input signals to the configurable logic circuits.

18. The electronic device of claim 10, wherein the configurable circuits includes configurable interconnect circuits each for configurably performing a set of interconnect operations, wherein a configurable interconnect circuit specifies an interconnect operation for the configurable interconnect circuit to perform within the configurable interconnect circuit'"'"'s set of interconnect operations.