Techniques for biasing a radio frequency digital to analog converter
First Claim
Patent Images
1. A baseband processor comprising:
- a plurality of output drivers to generate a plurality of base currents for biasing a radio frequency digital-to-analog converter;
a serial control interface to generate a programming signal for controlling a relationship among said plurality of base currents; and
a plurality of tuning voltage generators to generate a plurality of tuning voltages for biasing said plurality of output drivers, each of said plurality of tuning voltage generators comprising a current multiplier to be programmed by said serial control interface.
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Abstract
Various techniques for biasing a radio frequency digital-to-analog converter are described. In one embodiment, a baseband processor may comprise a plurality of output drivers to generate a plurality of base currents for biasing a radio frequency digital-to-analog converter. The baseband processor may comprise a serial control interface to generate a programming signal for controlling a relationship among the plurality of base currents. Other embodiments are described and claimed.
56 Citations
22 Claims
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1. A baseband processor comprising:
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a plurality of output drivers to generate a plurality of base currents for biasing a radio frequency digital-to-analog converter; a serial control interface to generate a programming signal for controlling a relationship among said plurality of base currents; and a plurality of tuning voltage generators to generate a plurality of tuning voltages for biasing said plurality of output drivers, each of said plurality of tuning voltage generators comprising a current multiplier to be programmed by said serial control interface. - View Dependent Claims (2, 5, 6, 12)
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3. A baseband processor comprising:
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a plurality of output drivers to generate a plurality of base currents for biasing a radio frequency digital-to-analog converter; a serial control interface to generate a programming signal for controlling a relationship among said plurality of base currents; and a plurality of tuning voltage generators to generate a plurality of tuning voltages for biasing said plurality of output drivers said serial control interface to control a ratio among said plurality of tuning voltages. - View Dependent Claims (13, 14, 15)
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4. A baseband processor comprising:
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a plurality of output drivers to generate a plurality of base currents for biasing a radio frequency digital-to-analog converter; a serial control interface to generate a programming signal for controlling a relationship among said plurality of base currents; and a plurality of tuning voltage generators to generate a plurality of tuning voltages for biasing said plurality of output drivers, said plurality of tuning voltage generators to adjust transconductance values of said plurality of output drivers. - View Dependent Claims (16, 17, 18)
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7. A baseband processor comprising:
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a plurality of output drivers to generate a plurality of base currents for biasing a radio frequency digital-to-analog converter, said plurality of output drivers to receive a single power level signal to adjust said plurality of base currents; a serial control interface to generate a programming signal for controlling a relationship among said plurality of base currents; and one or more analog multiplexers to receive said single power level signal. - View Dependent Claims (8, 19, 20)
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9. A baseband processor comprising:
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a plurality of output drivers to generate a plurality of base currents for biasing a radio frequency digital-to-analog converter said plurality of output drivers to receive a single power level signal to adjust said plurality of base currents; a serial control interface to generate a programming signal for controlling a relationship among said plurality of base currents; and one or more filters to provide said single power level signal to said plurality of output drivers. - View Dependent Claims (21, 22)
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10. A baseband processor comprising:
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a plurality of output drivers to generate a plurality of base currents for biasing a radio frequency digital-to-analog converter; and a serial control interface to generate a programming signal for controlling a relationship among said plurality of base currents, said baseband processor to detect a current gain (β
) of said radio frequency digital-to-analog converter and to generate a compensation signal proportional to 1/β
. - View Dependent Claims (11)
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Specification