Display panel and display panel driving method

• US 7,317,429 B2
• Filed: 12/12/2002
• Issued: 01/08/2008
• Est. Priority Date: 12/28/2001
• Status: Active Grant

• Current Assignee: Solas OLED Limited (Atlantic IP Services Limited)
• Original Assignee: Casio Computer Company Limited
• Inventors: Yamada, Hiroyasu, Hattori, Reiji, Shirasaki, Tomoyuki
• Primary Examiner(s): PATEL, NITIN
• Application Number:
  US10/472,423
• Publication Number:
  US 20040113873A1
• Time in Patent Office: 1,853 Days
• Field of Search: 345/76, 345/77, 345/80, 345/81, 345/82, 345/84, 345/87, 345 36- 42, 345/44, 345/45, 345 50- 51, 345589-605, 345/690, 315/169.1, 315/169.3, 348/800, 430/139
• US Class Current: 345/36
• CPC Class Codes: G09G 2300/0417 Special arrangements specific to the use of low carrier mobility technology
• CPC Class Codes: G09G 2300/0439 Pixel structures
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0866 by means of changes in the pixel supply voltage
• CPC Class Codes: G09G 3/325 the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays

Abstract

A display panel includes an optical element which has a pair of electrodes and exhibits an optical operation corresponding to an electric current flowing between the electrodes, and a switch circuit which supplies a memory current having a predetermined current value to a current line during a selection period, and stops the supply of the memory current to the current line during a non-selection period. A current memory circuit stores current data corresponding to the current value of the memory current flowing through the current line during the selection period and, in accordance with the current data stored during the selection period, supplies a display current having a current value substantially equal to the memory current to the optical element during the non-selection period.

Claims

1. A display panel comprising:

at least one optical element which has a pair of electrodes and exhibits an optical operation corresponding to an electric current flowing between the pair of electrodes;

at least one current line;

at least one switch circuit which supplies a memory current having a predetermined current value to the current line during a selection period, and which stops supply of the current to the current line during a non-selection period; and

at least one current memory circuit which stores current data corresponding to the current value of the memory current flowing through the current line during the selection period and, in accordance with the current data stored during the selection period, supplies a display current having a current value substantially equal to the current value of the memory current to the optical element during the non-selection period;

wherein the current memory circuit comprises a current control transistor connected in series with the optical element.

2. A display panel according to claim 1, wherein the current memory circuit comprises a capacitor, in which electric charges are written as the current data, between a gate and a source of the current control transistor.

3. A display panel according to claim 1, wherein the switch circuit comprises a current path control transistor which has a current path having one end connected to the current line, and which supplies the memory current to the current line during the selection period and stops the supply of the memory current to the current line during the non-selection period.

4. A display panel according to claim 1, wherein the switch circuit comprises a current data write control transistor which controls writing of the current data to the current memory circuit.

5. A display panel according to claim 1, wherein the display panel comprises a plurality of said optical elements, a plurality of said current memory circuits, and a plurality of said switch circuits;

and

wherein a plurality of pixels, each including one said optical element, one said current memory circuit, and one said switch circuit, are arrayed in a matrix.

6. A display panel according to claim 1, further comprising a data driver which allows the memory current to flow from the current memory circuit to the current line during the selection period.

7. A display panel according to claim 1, further comprising a display voltage scan line which is connected to the current memory circuit, and to which a voltage for supplying the display current to the optical element is output.

8. A display panel according to claim 7, wherein a first end of a current path of the current memory circuit is connected to the optical element, and a second end of the current path is connected to the display voltage scan line.

9. A display panel according to claim 1, further comprising a selection scan line to which a selection scan signal for selecting the switch circuit is output.

10. A display panel according to claim 9, wherein the switch circuit comprises a current path control transistor which has a current path having a first end connected to the current line and a second end connected to the current memory circuit, and the current path control transistor of the switch circuit has a control terminal connected to the selection scan line.

11. A display panel according to claim 9, wherein the switch circuit comprises a current data write control transistor having a control terminal connected to the selection scan line.

12. A display panel according to claim 9, further comprising a selection scan driver which outputs the selection scan signal to the selection scan line.

13. A display panel according to claim 1, wherein a first one of the pair of electrodes of the optical element is connected to the current memory circuit, and a second one of the pair of electrodes of the optical element is connected to a constant-voltage power supply.

14. A display panel according to claim 1, wherein the optical element comprises a light emitting element.

15. A display panel according to claim 14, wherein the light emitting element comprises an EL element.

16. A display panel comprising:

at least one optical element which has a pair of electrodes and exhibits an optical operation corresponding to an electric current flowing between the pair of electrodes;

at least one current line;

at least one switch circuit which supplies a memory current having a predetermined current value to the current line during a selection period, and which stops supply of the current to the current line during a non-selection period; and

at least one current memory circuit which stores current data corresponding to the current value of the memory current flowing through the current line during the selection period and, in accordance with the current data stored during the selection period, supplies a display current having a current value substantially equal to the current value of the memory current to the optical element during the non-selection period;

wherein the current memory circuit comprises a current control transistor connected in series with the optical element, and

wherein the switch circuit comprises a current path control transistor which supplies the memory current to the current line during the selection period, and a current data write control transistor which writes the current value of the memory current flowing through the current line during the selection period as the current data between the gate and source of the current control transistor.

17. A display panel comprising:

at least one optical element which has a pair of electrodes and exhibits an optical operation corresponding to an electric current flowing between the pair of electrodes;

at least one current line;

at least one switch circuit which supplies a memory current having a predetermined current value to the current line during a selection period, and which stops supply of the current to the current line during a non-selection period;

at least one current memory circuit which stores current data corresponding to the current value of the memory current flowing through the current line during the selection period and, in accordance with the current data stored during the selection period, supplies a display current having a current value substantially equal to the current value of the memory current to the optical element during the non-selection period; and

a display voltage scan line which is connected to the current memory circuit, and to which a voltage for supplying the display current to the optical element is output;

wherein a first end of a current path of the current memory circuit is connected to the optical element, and a second end of the current path is connected to the display voltage scan line; and

wherein the display panel further comprises a display voltage scan driver which applies a voltage to the current memory circuit through the display voltage scan line during the selection period so that the memory current may flow in the current memory circuit during the selection period, and which applies a voltage to the current memory circuit through the display voltage scan line during the non-selection period so that the display current in accordance with the current data may flow in the current memory circuit during the non-selection period, wherein the current value of the display current is substantially equal to the current value of the memory current flowing in the current memory circuit during the selection period.

18. A display panel according to claim 17, wherein a first one of the pair of electrodes of the optical element is connected to the current memory circuit, and a second one of the pair of electrodes of the optical element is connected to a constant-voltage power supply;

and

wherein the voltage output by the display voltage scan driver during the selection period is not more than a potential of the constant-voltage power supply, and the voltage output by the display voltage scan driver during the non-selection period is not less than the voltage output during the selection period and higher than the potential of the constant-voltage power supply.

19. A display panel comprising:

at least one optical element which has a pair of electrodes and exhibits an optical operation corresponding to an electric current flowing between the pair of electrodes;

at least one current line;

at least one switch circuit which supplies a memory current having a predetermined current value to the current line during a selection period, and which stops supply of the current to the current line during a non-selection period;

at least one current memory circuit which stores current data corresponding to the current value of the memory current flowing through the current line during the selection period and, in accordance with the current data stored during the selection period, supplies a display current having a current value substantially equal to the current value of the memory current to the optical element during the non-selection period;

a display voltage scan line to which a voltage for supplying the display current to the optical element is output; and

a selection scan line to which a selection scan signal for selecting the switch circuit is output,

wherein the current memory circuit comprises a current control transistor which has a current path having a first end connected to the optical element and a second end connected to the display voltage scan line, and

wherein the switch circuit comprises;

a current data write control transistor which has a control terminal connected to the selection scan line, and a current path having a first end connected to the control terminal of the current control transistor and a second end connected to one of the display voltage scan line and the selection scan line; and

a current path control transistor which has a control terminal connected to the selection scan line, and a current path having a first end connected to the current line and a second end connected to the first end of the current control transistor.

20. A display panel according to claim 19, further comprising:

a selection scan driver which outputs the selection scan signal to the selection scan line;

a data driver which supplies the memory current to the current line and the current memory circuit during the selection period; and

a display voltage scan driver which applies a voltage to the current memory circuit through the display voltage scan line during the selection period so that the memory current may flow in the current memory circuit during the selection period, and applies the voltage to the current memory circuit through the display voltage scan line during the non-selection period so that the display current in accordance with the current data may flow in the current memory circuit during the non-selection period, wherein the current value of the display current is substantially equal to the current value of the memory current flowing in the current memory circuit during the selection period.

21. A display panel according to the claim 19, wherein the display voltage scan driver outputs a saturated current path voltage to the display voltage scan line so that a voltage between the first end and the second end of the current path of the current control transistor may be saturated and the display current in accordance with a voltage between the control terminal and the first end of the current path of the current control transistor may flow through the current path of the current control transistor during the non-selection period.

22. A display panel according to claim 19, wherein the current control transistor, the current data write control transistor, and the current path control transistor are single-channel transistors having the same channel.

23. A display panel driving method for driving a display panel, comprising:

supplying a memory current having a predetermined current value to a current memory circuit of the display panel and storing current data corresponding to the current value to the current memory circuit during a selection period; and

supplying, to an optical element of the display panel during a non-selection period, a display current having a current value substantially equal to the current value of the memory current in accordance with the current data stored in the current memory circuit;

wherein the memory current supplied to the current memory circuit is not supplied not through the optical element.

24. A display panel driving method according to claim 23, wherein the memory current is supplied to the current memory circuit through a current line, and the display current supplied to the optical element is not supplied through the current line.

25. A display panel driving method for driving a display panel, comprising:

supplying a memory current having a predetermined current value to a current memory circuit of the display panel and storing current data corresponding to the current value to the current memory circuit during a selection period; and

supplying, to an optical element of the display panel during a non-selection period, a display current having a current value substantially equal to the current value of the memory current in accordance with the current data stored in the current memory circuit;

wherein the current memory circuit comprises;

(i) a current control transistor which has a current path having a first end connected to a first end of the optical element and a second end connected to a display voltage scan line, and (ii) a capacitor which is connected between a gate and a source of the current control transistor and which stores the current data.

26. A display panel driving method according to claim 25, wherein a voltage for supplying the memory current is output to the display voltage scan line during the selection period, and a voltage for supplying the display current is output to the display voltage scan line during the non-selection period.

27. A display panel driving method according to claim 25, wherein electric charge corresponding to the memory current flowing through the current path of the current control transistor during the selection period is written as the current data in the capacitor under the control of a current data write control transistor in accordance with a selection scan signal from a selection scan line.

28. A display panel driving method according to claim 27, wherein the electric charge written in the capacitor during the selection period is held under the control of the current data write control transistor during the non-selection period.

29. A display panel driving method according to claim 25, wherein the memory current flowing through the current path of the current control transistor during the selection period flows through a current line under the control of a current path control transistor driven in accordance with a selection scan signal from a selection scan line.

30. A display panel driving method according to claim 25, wherein the display current flowing through the current path of the current control transistor during the non-selection period flows through the optical element under the control of a current path control transistor driven in accordance with a selection scan signal from a selection scan line.

31. A display panel driving method according to claim 25, wherein the display panel further comprises:

a selection scan line to which a selection scan signal is output;

a current line through which the memory current flows;

a current data write control transistor which has a control terminal connected to the selection scan line, and a current path having a first end connected to a gate of the current control transistor and a second end connected to one of the display voltage scan line and the selection scan line, and which controls writing of the current data of the memory current in accordance with the selection scan signal; and

a current path control transistor which has a control terminal connected to the selection scan line, and a current path having a first end connected to the current line and a second end connected to the first end of the current path of the current control transistor, and which supplies the memory current to the current line via the current control transistor in accordance with the selection scan signal.

32. A display panel driving method according to claim 31, wherein the supplying of the memory current and storing the current data corresponding to the current value of the memory current comprises, during the selection period, supplying the memory current to the current path of the current control transistor by selecting the current data write control transistor and the current path control transistor in accordance with the selection scan signal from the selection scan line, and storing electric charge as the current data corresponding to the current value of the memory current in the capacitor, and

wherein the supplying of the display current to the optical element comprises, during the non-selection period, causing the current data write control transistor to hold the current data and causing the current path control transistor to stop supply of an electric current to the current line in accordance with the selection scan signal from the selection scan line, and applying a voltage different from a potential at a second end of the optical element to the display voltage scan line, whereby the display current corresponding to the current data flows through the path of the current control transistor and the optical element.

33. A display panel driving method according to claim 31, wherein the display panel further comprises:

a selection scan driver which outputs the selection scan signal to the selection scan line;

a data driver which draws the memory current from current control transistor to the current line during the selection period; and

a display voltage scan driver which applies a voltage to the current memory circuit through the display voltage scan line during the selection period so that the memory current may flow in the current control transistor during the selection period, and which applies the voltage to the current control transistor through the display voltage scan line during the non-selection period so that the display current in accordance with the current data may flow in the optical element during the non-selection period.

34. A display panel driving method according to the claim 33, wherein the display voltage scan driver outputs a saturated current path voltage to the display voltage scan line so that a voltage between the first end and the second end of the current path of the current control transistor may be saturated and the display current in accordance with a voltage between the gate and the first end of the current path of the current control transistor may flow through the current path of the current control transistor during the non-selection period.