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Chip structure with redistribution traces

  • US 7,319,277 B2
  • Filed: 07/14/2005
  • Issued: 01/15/2008
  • Est. Priority Date: 05/08/2003
  • Status: Active Grant
First Claim
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1. A chip package comprising:

  • a chip comprising;

    a semiconductor substrate,an electronic device in or on said semiconductor substrate,a metallization structure over said semiconductor substrate,a passivation layer over said metallization structure, wherein said passivation layer comprises a nitiide layer, an opening in said passivation layer exposing a first contact pad of said metallization structure, wherein there is no electronic device in or on said semiconductor substrate directly under said first contact pad, anda circuit trace over said passivation layer and said first contact pad, wherein said circuit trace comprises a second contact pad connected to said first contact pad through said opening in said passivation layer, the positions of said first and second contact pads from a top perspective view being different, said second contact pad being directly over said electronic device, and wherein said circuit trace comprises a first metal layer containing gold with greater than 90 weight percent and having a thickness of between 2 and 30 microns, a second metal layer containing titanium under said first metal layer, and a third metal layer containing gold between said first and second metal layers; and

    a wire wirebonded to said second contact pad.

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