Foldback free capacitance-to-digital modulator
First Claim
1. A sigma-delta integrator comprising:
- a sensor excitation node;
an integrator input node;
an amplifier having a first input, a second input and an output;
an auto-zero capacitor connected between the integrator input node and the first input of the amplifier;
a feedback capacitor having a first terminal connected to the output of the amplifier, and having a second terminal that is connected to the first input of the amplifier during an auto-zero phase and is connected to the integrator input node during an integration phase;
a first sensor capacitor connected to the sensor excitation node and selectively connected to the integrator input node;
a sensor excitation signal source connected to the sensor excitation node for providing to the first sensor capacitor a sensor excitation signal having a first supply voltage level during the auto-zero phase and a second supply voltage level during the integration phase; and
a circuit for providing to the integrator input node, during the auto-zero phase, a voltage that is a function of leakage resistance of the first sensor capacitor.
1 Assignment
0 Petitions
Accused Products
Abstract
A capacitance-to-digital (CD) modulator converts capacitance of a differential pressure sensor to a pulse code modulation output signal. The first stage of the CD modulator is a sigma-delta integrator having an auto-zero capacitor connected between an integrator input node and an amplifier input. During an auto-zero phase, a feedback capacitor is connected between the amplifier input and output, and the auto-zero capacitor stores a voltage that is a function of leakage resistance of the sensor capacitor connected to the integrator input node. During an integration phase, the feedback capacitor is connected to the integrator input node. If an overpressure/short circuit condition exists, the stored voltage on the auto-zero capacitor induces a current to flow to the feedback capacitor to drive the integrator to saturation and suppress foldback anomaly.
12 Citations
16 Claims
-
1. A sigma-delta integrator comprising:
-
a sensor excitation node; an integrator input node; an amplifier having a first input, a second input and an output; an auto-zero capacitor connected between the integrator input node and the first input of the amplifier; a feedback capacitor having a first terminal connected to the output of the amplifier, and having a second terminal that is connected to the first input of the amplifier during an auto-zero phase and is connected to the integrator input node during an integration phase; a first sensor capacitor connected to the sensor excitation node and selectively connected to the integrator input node; a sensor excitation signal source connected to the sensor excitation node for providing to the first sensor capacitor a sensor excitation signal having a first supply voltage level during the auto-zero phase and a second supply voltage level during the integration phase; and a circuit for providing to the integrator input node, during the auto-zero phase, a voltage that is a function of leakage resistance of the first sensor capacitor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
-
-
10. A sigma-delta integrator for selectively forming charge packets as a function of sensor capacitance during an auto-zero phase, and integrating the charge packets during an integration phase to produce an integrator output voltage, the sigma-delta integrator comprising:
-
an integrator input node; an amplifier having a first input, a second input and an output; a feedback capacitor connected to the output of the amplifier; and an auto-zero capacitor connected to the integrator input node for storing voltage that is a function of sensor leakage resistance during the auto-zero phase. - View Dependent Claims (11, 12)
-
-
13. A capacitance-to-digital modulator comprising:
-
a first capacitance pressure sensor; a second capacitance pressure sensor; a first integrator for selectively forming charge packets as a function of capacitance of one of the first and second capacitance pressure sensors during a first phase, and integrating charge during a second phase to produce an integrator output voltage; an integrator input node; an amplifier having a first input, a second input and an output; a feedback capacitor connected to the output of the amplifier; a switching circuit for selectively connecting the first capacitance pressure sensor and the second capacitance pressure sensor to the integrator input node, for connecting the feedback capacitor to the first input during the first phase, and for connecting the feedback capacitor to the integrator input node during the second phase; and an auto-zero capacitor connected between the integrator input node and the first input of the amplifier, wherein the auto-zero capacitor stores a voltage that is a function of sensor leakage resistance during the first phase. - View Dependent Claims (14, 15, 16)
-
Specification