Comparator-based switched capacitor circuit for scaled semiconductor fabrication processes
First Claim
1. A switched capacitor circuit for performing an analog circuit function, comprising:
- a first switched capacitance network having an input terminal to receive a circuit input voltage during a first phase;
a comparator having an output terminal and an input terminal, the input terminal being in communication with the first switched capacitance network;
a second switched capacitance network having a first switched terminal in communication with the output terminal of the comparator; and
a first current source in communication with the first and the second switched capacitance networks, the first current source supplying a current to charge the first and the second switched capacitance networks during a second phase.
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Accused Products
Abstract
Described is a switched capacitor circuit for performing an analog circuit function. Unlike conventional switched capacitor circuits employing operational amplifiers, the switched capacitor circuit uses a comparator and does not require direct feedback between the input and output of the comparator. The switched capacitor circuit includes a first and a second switched capacitance network, a comparator and a current source. The first switched capacitance network has an input terminal to receive a circuit input voltage during a first phase. The comparator has an input terminal in communication with the first switched capacitance network and an output terminal in communication with the second switched capacitance network through a switched terminal. The current source communicates with the switched capacitance networks and supplies a current to charge the networks during a second phase. The circuit can be used, for example, to provide high gain amplification in integrated circuits.
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Citations
16 Claims
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1. A switched capacitor circuit for performing an analog circuit function, comprising:
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a first switched capacitance network having an input terminal to receive a circuit input voltage during a first phase; a comparator having an output terminal and an input terminal, the input terminal being in communication with the first switched capacitance network; a second switched capacitance network having a first switched terminal in communication with the output terminal of the comparator; and a first current source in communication with the first and the second switched capacitance networks, the first current source supplying a current to charge the first and the second switched capacitance networks during a second phase. - View Dependent Claims (2, 3, 4, 5)
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6. A method for performing an analog circuit function in a circuit comprising a comparator in communication with a switched capacitance network and a load capacitor, the method comprising:
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sampling an input voltage using the switched capacitance network during a first phase; applying a voltage present at a node in the switched capacitance network to an input terminal of the comparator during a first part of a second phase, the voltage at the node being responsive to the sampled circuit input voltage; applying a reference voltage to the switched capacitance network during the first part of the second phase; terminating the application of the reference voltage at the start of a second part of the second phase; supplying a current to the switched capacitance network and the load capacitor during the second part of the second phase; and terminating the supplied current when an output state of the comparator changes during the second part of the second phase. - View Dependent Claims (7, 8)
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9. A method for performing an analog circuit function in a circuit comprising a comparator in communication with a switched capacitance network and a switched load capacitor, wherein the switched load capacitor has a switch to couple the switched load capacitor to a first reference voltage, the method comprising:
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sampling an input voltage using the switched capacitance network during a first phase; applying a voltage present at a node in the switched capacitance network to the input terminal of the comparator during a first part of a second phase, the voltage at the node being responsive to the sampled circuit input voltage; applying a second reference voltage to the switched capacitance network during the first part of the second phase; terminating the application of the second reference voltage at the start of a second part of the second phase; and supplying a first ramp waveform to the switched capacitance network and the load capacitor during the second part of the second phase. - View Dependent Claims (10, 11, 12, 13)
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14. A stage for an analog to digital converter comprising:
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a clocked comparator having an input terminal to receive an input voltage and provide a bit value in response thereto; a comparator having an input terminal; a first sampling capacitor and a second sampling capacitor each having a first terminal in communication with the input terminal of the comparator and each having a second terminal configured to receive the input voltage during the first phase, the second terminal of the first sampling capacitor being configured to receive a negative supply voltage during a first part of a second phase, the second terminal of the second sampling capacitor being configured to receive a second reference voltage during the second phase; a first current source in communication with the second terminal of the first sampling capacitor during a second part of the second phase; and a load capacitor having a first terminal configured to receive the first reference voltage in response to an output voltage generated by the comparator and having a second terminal in communication with the second terminal of the first sampling capacitor during the second phase. - View Dependent Claims (15, 16)
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Specification