Semiconductor package substrate with embedded resistors and method for fabricating the same

• US 7,323,762 B2
• Filed: 11/01/2004
• Issued: 01/29/2008
• Est. Priority Date: 11/01/2004
• Status: Expired due to Fees

• Current Assignee: Phoenix Precision Technology Corporation (Unimicron Technology Corporation)
• Original Assignee: Phoenix Precision Technology Corporation (Unimicron Technology Corporation)
• Inventors: Lai, Zao-Kuo, Wong, Lin-Yin
• Primary Examiner(s): THAI, LUAN C
• Application Number:
  US10/976,878
• Publication Number:
  US 20060094156A1
• Time in Patent Office: 1,184 Days
• Field of Search: 257536-537, 257/581, 438381-382, 438/384, 438/238
• US Class Current: 257/536
• CPC Class Codes: H01L 2224/0554 External layer
• CPC Class Codes: H01L 2224/0555 Shape
• CPC Class Codes: H01L 2224/0556 Disposition
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/04941 TiN
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H05K 1/095 for polymer thick films, i.e. having a permanent organic polymeric binder
• CPC Class Codes: H05K 1/167 incorporating printed resistors
• CPC Class Codes: H05K 2201/0317 Thin film conductor layer; Thin film passive component
• CPC Class Codes: H05K 2201/09509 Blind vias, i.e. vias having one side closed
• CPC Class Codes: H05K 2203/1453 Applying the circuit pattern before another process, e.g. before filling of vias with conductive paste, before making printed resistors
• CPC Class Codes: H05K 3/429 Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
• CPC Class Codes: H05K 3/4644 by building the multilayer layer by layer, i.e. build-up multilayer circuits making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602

Abstract

A semiconductor package substrate with embedded resistors and a method for fabricating the same are proposed. Firstly, an inner circuit board having a first circuit layer thereon is provided, and a plurality of resistor electrodes are formed in the fist circuit layer. Then, a patterned resistive material is formed on the inner circuit board and electrically connected to the resistor electrodes to accurately define a resistance value of resistors. Subsequently, at least one insulating layer is coated on a surface of the circuit board having the patterned resistive material. At least one patterned second circuit layer is formed on the insulating layer and electrically connected to the resistor electrodes by a plurality of conductive vias formed in the insulating layer or plated through holes formed through the circuit board.

Claims

1. A semiconductor package substrate with embedded resistors, comprising:

an inner circuit board having a patterned first circuit layer thereon, the first circuit layer having a plurality of pairs of resistor electrodes;

at least one patterned resistive material electrically connected to the resistor electrodes, wherein the at least one patterned resistive material is filled between each of the pairs of the resistor electrodes, respectively, and partially or completely covering the resistor electrodes;

at least one patterned second circuit layer formed above the first circuit layer and spaced from the first circuit layer by an insulating layer;

a plurality of plated through holes formed through the insulating layer, the patterned circuit layers and the inner circuit board, and electrically connected to the patterned first and second circuit layers and an electrode of the pair of resistor electrodes; and

a plurality of conductive vias formed In the insulating layer and electrically connected to the other electrode of the pair of resistor electrodes.

2. The semiconductor package substrate of claim 1, wherein the inner circuit board is one selected from the group consisting of a double-layer circuit board and a multi-layer circuit board.

3. The semiconductor package substrate of claim 1, wherein the patterned resistive material is electrically connected to the resistor electrodes.

4. The semiconductor package substrate of claim 1, wherein the patterned resistive material includes a thick film resistive material, such that the patterned thick film resistive material is electrically connected to the resistor electrodes.

5. The semiconductor package substrate of claim 1, wherein the patterned resistive material includes a thin film resistive material, such that the patterned thin film resistive material is electrically connected to the resistor electrodes.