Delivering data processing requests to a suspended operating system
First Claim
1. A method of processing data with one or more data processing threads executing under control of a first operating system and one or more data processing threads executing under control of a second operating system, said method comprising the steps of:
- executing a first data processing thread under control of said first operating system;
receiving a first interrupt operable to suspend execution of said first data processing thread at a first thread exit point and to trigger interrupt processing under control of said second operating system;
executing interrupt handing code under control of said second operating system;
generating a return interrupt;
determining under control of said second operating system a return data processing thread to be executed under control of said first operating system;
executing return interrupt handling code under control of said first operating system, said return interrupt handling code being configured such that;
(i) if said return data processing thread is said first data processing thread, then said first data processing thread is resumed at said first thread exit point; and
(ii) if said return data processing thread is a second data processing thread different from said first data processing thread, then a thread switching operation is performed under control of said first operating system to save context data associated with said first data processing thread at said first thread exit point such that said first data processing thread may later be resumed from said first thread exit point and to trigger execution of a second data processing thread under control of said first operating system.
1 Assignment
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Accused Products
Abstract
In a system supporting more than one operating system, a data processing thread executing on a first operating system may be subject to an interrupt which triggers interrupt handling on a second operating system. When that interrupt handling is completed on the second operating system, the first operating system is resumed using a return interrupt. The return interrupt specifies the data processing thread which is active on the second operating system such that an appropriate task switch or resumption may be made on the first operating system. The technique is particularly well suited to systems utilising a secure operating system and a non-secure operating system executing on the same hardware.
43 Citations
15 Claims
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1. A method of processing data with one or more data processing threads executing under control of a first operating system and one or more data processing threads executing under control of a second operating system, said method comprising the steps of:
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executing a first data processing thread under control of said first operating system; receiving a first interrupt operable to suspend execution of said first data processing thread at a first thread exit point and to trigger interrupt processing under control of said second operating system; executing interrupt handing code under control of said second operating system; generating a return interrupt; determining under control of said second operating system a return data processing thread to be executed under control of said first operating system; executing return interrupt handling code under control of said first operating system, said return interrupt handling code being configured such that; (i) if said return data processing thread is said first data processing thread, then said first data processing thread is resumed at said first thread exit point; and (ii) if said return data processing thread is a second data processing thread different from said first data processing thread, then a thread switching operation is performed under control of said first operating system to save context data associated with said first data processing thread at said first thread exit point such that said first data processing thread may later be resumed from said first thread exit point and to trigger execution of a second data processing thread under control of said first operating system. - View Dependent Claims (2, 3, 4, 5, 6, 7, 15)
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8. Apparatus for processing data with one or more data processing threads executing under control of a first operating system and one or more data processing threads executing under control of a second operating system, said apparatus comprising:
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execution logic configured to execute a first data processing thread under control of said first operating system; interrupt receiving logic configured to receive a first interrupt and suspend execution of said first data processing thread at a first thread exit point and to trigger interrupt processing under control of said second operating system; interrupt handling execution logic configured to execute interrupt handing code under control of said second operating system; a return interrupt generator configured to generate a return interrupt; return data processing thread determining logic configured to determine under control of said second operating system a return data processing thread to be executed under control of said first operating system; return interrupt handling code execution logic configured to execute return interrupt handling code under control of said first operating system, said return interrupt handling code being configured such that; (i) if said return data processing thread is said first data processing thread, then said first data processing thread is resumed at said first thread exit point; and (ii) if said return data processing thread is a second data processing thread different from said first data processing thread, then a thread switching operation is performed under control of said first operating system to save context data associated with said first data processing thread at said first thread exit point such that said first data processing thread may later be resumed from said first thread exit point and to trigger execution of a second data processing thread under control of said first operating system. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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Specification