System and method to test integrated circuits on a wafer
First Claim
Patent Images
1. A system to test integrated circuits on a wafer, comprising:
- a transceiver formed on the wafer, wherein the transceiver is formed in one of a scribe line formed in the wafer or on an otherwise unusable portion of the wafer to permit testing of the integrated circuits during various stages of a manufacturing process and before separation of the individual integrated circuits and to avoid using any area of the wafer useable to form an integrated circuit; and
an antenna system couplable to the transceiver.
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Abstract
A system to test integrated circuits on a wafer may include a transceiver formed on the wafer. The system may also include an antenna system couplable to the transceiver. The transceiver may be formed in one of a scribe line on the wafer, a chip on the wafer or on an otherwise unusable portion of the wafer. The antenna system maybe formed in at least one of the same scribe line as the transceiver or in at least one other scribe line formed in the wafer. Alternatively, the antenna system may include an antenna external to the wafer.
34 Citations
58 Claims
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1. A system to test integrated circuits on a wafer, comprising:
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a transceiver formed on the wafer, wherein the transceiver is formed in one of a scribe line formed in the wafer or on an otherwise unusable portion of the wafer to permit testing of the integrated circuits during various stages of a manufacturing process and before separation of the individual integrated circuits and to avoid using any area of the wafer useable to form an integrated circuit; and an antenna system couplable to the transceiver. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28)
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29. A system to test integrated circuits on a wafer, comprising:
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a plurality of transceivers each adapted to receive and transmit signals to test selected ones of a multiplicity of integrated circuits formed on the wafer and each of the transceivers being formed at a different location on the wafer in one of a plurality of scribe lines formed in the wafer or at other otherwise unusable locations on the wafer to permit testing of the integrated circuits during various stages of a manufacturing process and before separation of the individual integrated circuits and to avoid using any area of the wafer useable to form integrated circuits; and at least one antenna systems couplable to the plurality of transceivers. - View Dependent Claims (30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41)
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42. A method of making a system to test integrated circuits on a wafer, comprising:
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forming a transceiver on the wafer, wherein the transceiver is formed in one of a scribe line formed in the wafer or on an otherwise unusable portion of the wafer to permit testing of the integrated circuits during various stages of a manufacturing process and before separation of the individual integrated circuits and to avoid using any area of the wafer useable to form an integrated circuit; and providing an antenna system couplable to the transceiver. - View Dependent Claims (43, 44, 45, 46, 47, 48, 49)
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50. A method to test integrated circuits on a wafer, comprising:
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selecting at least one integrated circuit of a plurality of integrated circuits to be tested; performing a test or self-test on the at least one selected integrated circuit in response to selecting the at least one integrated circuit; and transmitting test results via a transceiver associated with the at least one selected integrated circuit, wherein the transceiver is formed on the wafer in one of a scribe line formed in the wafer or on an otherwise unusable portion of the wafer to permit testing of the integrated circuits during various stages of a manufacturing process and before separation of the individual integrated circuits and to avoid using any area of the wafer useable to form one of the plurality of integrated circuits. - View Dependent Claims (51, 52, 53, 54, 55, 56, 57, 58)
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Specification