Trench structure having a void and inductor including the trench structure

• US 7,326,625 B2
• Filed: 02/07/2005
• Issued: 02/05/2008
• Est. Priority Date: 02/09/2004
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Chung, Chul-Ho, Jeong, Joo-Hyun
• Primary Examiner(s): Geyer; Scott B.
• Assistant Examiner(s): Ullah; Elias
• Application Number:
  US11/052,552
• Publication Number:
  US 20050176215A1
• Time in Patent Office: 1,093 Days
• Field of Search: 438/242, 438/248, 438/421
• US Class Current: 438/386
• CPC Class Codes: H01L 21/764 Air gaps H01L21/76264 takes precedence
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: H01L 28/10 Inductors

Abstract

In a method of forming a trench structure having a wide void therein, a first trench having a first width and a first depth is formed in a substrate. The first trench is filled with a first insulation layer pattern defining the void in the first trench. A second trench is formed on the first trench. The second trench has a second width wider than the first width and a second depth shallower than the first depth. The second trench is filled with a second insulation layer pattern. After an insulating interlayer on the substrate including the first and second trenches, a conductive line is formed on a portion of the insulating interlayer where the second trench is positioned so that an inductor is formed over the trench structure.

Claims

1. A method of forming a trench structure comprising:

forming a deep trench having a first width and a first depth on a substrate, wherein forming the deep trench comprises;

forming a pad oxide layer pattern on the substrate;

forming a first nitride layer pattern on the pad oxide layer pattern;

forming a first oxide layer pattern on the first nitride layer pattern;

partially etching the substrate using the first oxide layer pattern, the first nitride layer pattern and the pad oxide layer pattern as etching masks; and

removing the first oxide layer pattern;

forming an enclosed void in the deep trench by filling the deep trench with a first insulation layer pattern in a manner that defines the enclosed void in the deep trench,

wherein forming the enclosed void in the deep trench comprises;

forming a second oxide layer pattern on a sidewall of the deep trench;

forming a second nitride layer pattern on the second oxide layer pattern to form an opening in the deep trench; and

forming a third oxide layer pattern on the second nitride layer pattern to complete the enclosed void by covering a top portion of the opening;

forming a shallow trench on the deep trench, the shallow trench having a second width substantially wider than the first width and a second depth substantially shallower than the first depth; and

filling up the shallow trench with a second insulation layer pattern.

2. The method of claim 1, further comprising forming a channel stop region at a portion of the substrate beneath the deep trench.

3. The method of claim 2, wherein the channel stop region is formed using elements in Group III as impurities.

4. The method of claim 1, wherein forming the enclosed void in the deep trench further comprises:

forming a second nitride layer on the second oxide layer pattern and the first nitride layer pattern;

over-etching the second nitride layer to form the second nitride layer pattern that partially exposes a portion of the substrate;

forming an epitaxial silicon layer from the exposed portion of the substrate;

forming a third oxide layer on the epitaxial silicon layer and the second nitride layer pattern; and

etching the third oxide layer to form the third oxide layer pattern that covers a top portion of the opening.

5. The method of claim 4, wherein the second nitride layer is etched by an etch back process and the third oxide layer is etched by a chemical mechanical polishing process.

6. The method of claim 4, wherein the epitaxial silicon layer grows from the exposed portion of the substrate in a direction parallel to the substrate so that the opening is partially closed by the epitaxial silicon layer.

7. The method of claim 4, wherein forming the shallow trench comprises:

forming a second photoresist pattern on the third oxide layer pattern and the first nitride layer pattern; and

partially etching the first nitride layer pattern, the third oxide layer pattern, the pad oxide layer pattern, the epitaxial silicon layer and the substrate using the second photoresist pattern as an etching mask.

8. The method of claim 7, further comprising forming an anti reflective layer between the third oxide layer pattern and the second photoresist pattern and between the first nitride layer pattern and the second photoresist pattern.

9. The method of claim 7, wherein filling up the shallow trench with the second insulation layer pattern comprises:

forming a fourth oxide layer pattern on a sidewall of the shallow trench;

forming a third nitride layer pattern on the fourth oxide layer pattern and the third oxide layer pattern;

forming a fifth oxide layer pattern on the third nitride layer pattern; and

forming a sixth oxide layer pattern on the fifth oxide layer pattern to fill up the shallow trench.

10. The method of claim 9, wherein filling up the shallow trench with the second insulation layer pattern further comprises:

sequentially forming a third nitride layer, a fifth oxide layer, a sixth oxide layer and a seventh oxide layer on the fourth oxide layer pattern and the third oxide layer pattern; and

etching the seventh oxide layer, the sixth oxide layer, the fifth oxide layer and the third nitride layer until the pad oxide layer pattern is exposed to form the third nitride layer pattern, the fifth oxide layer pattern and the sixth oxide layer pattern in the shallow trench.

11. The method of claim 1, wherein forming the deep trench further comprises:

sequentially forming a pad oxide layer, a first nitride layer and a first oxide layer on the substrate;

forming a first photoresist pattern on the first oxide layer, the first photoresist pattern including an opening having the first width, through which the first oxide layer is partially exposed; and

sequentially etching the first oxide layer, the first nitride layer and the pad oxide layer using the first photoresist pattern as an etching mask to form the pad oxide layer pattern, the first nitride layer pattern and the first .oxide layer pattern on the substrate.