Adaptive predistortion for a transmit system with gain, phase and delay adjustments

• US 7,327,192 B2
• Filed: 10/05/2006
• Issued: 02/05/2008
• Est. Priority Date: 07/03/2003
• Status: Expired due to Term

• Current Assignee: Zarbana Digital Fund LLC (Intellectual Ventures LLC)
• Original Assignee: Zarbana Digital Fund LLC (Intellectual Ventures LLC)
• Inventors: Saed, Aryan
• Primary Examiner(s): NGUYEN, PATRICIA T
• Application Number:
  US11/539,034
• Publication Number:
  US 20070080749A1
• Time in Patent Office: 488 Days
• Field of Search: 330/149, 330/107, 330/136
• US Class Current: 330/149
• CPC Class Codes: H03F 1/0294 using vector summing of two or more constant amplitude phase-modulated signals
• CPC Class Codes: H03F 1/32 Modifications of amplifiers to reduce non-linear distortion by negative feedback H03F1/34
• CPC Class Codes: H03F 1/3247 using feedback acting on predistortion circuits H03F1/3264 takes precedence
• CPC Class Codes: H03F 1/3282 Acting on the phase and the amplitude of the input signal
• CPC Class Codes: H03F 2200/331 Sigma delta modulation being used in an amplifying circuit
• CPC Class Codes: H03F 2201/3233 Adaptive predistortion using lookup table, e.g. memory, RAM, ROM, LUT, to generate the predistortion
• CPC Class Codes: H03F 3/24 of transmitter output stages

Abstract

Systems and methods relating to the provision of gain, phase and delay adjustments to signals to be used by a predistortion subsystem. A portion of an input signal is delayed by delay elements prior to being received by the predistortion subsystem. The delayed input signal portion is also received by a feedback signal processing subsystem that adjusts the gain and phase of the feedback signal based on the delayed input signal portion. The adjusted feedback signal is used, along with the delayed portion of the input signal, to determine an appropriate predistortion modification to be applied to the input signal.

Claims

1. A method of initializing a phase correction to be applied to a feedback signal, said feedback signal to be used in determining a deliberate predistortion for a signal processing system, the method comprising:

a) initiating a coarse delay search

b) selecting a time window of W samples of said feedback signal and an input signal with a predetermined sample delay increments of δ

between samples

c) calculating an inner product P_δ

by performing a complex multiply and accumulate process for the W samples in the time window

d) storing a maximum |P_δ

| found

e) repeating steps c) and d) for subsequent time windows and incrementing delta by a predetermined amount for each time window

f) repeating steps b)-e) for a fine delay search using factional sample increments to cover a predetermined delay range, said delay range being centered on a maximum delay increment δ

_max found during said coarse delay search.

2. A method according to claim 1 wherein said inner product process is defined by

$P_{\delta }$

= A MAC ·

∑

k = n ·

W n ·

W + W - 1 ⁢

exp ⁡

( j ·

( ∠

⁢

⁢

x δ

⁡

( k ) - ∠

⁢

⁢

z ⁡

( k ) ) )

where

∠

x_δ

(k) is a phase of said input signal

φ

z(k) is a phase of said feedback signal

A_MAC is a constant

n is an integer denoting a time window.

3. A method according to claim 1 wherein said phase correction is a phase of said maximum P_δ

.

4. A method according to claim 1 wherein said inner product P_δ

is based on a phase of said input signal and on a phase of a system output signal.

8. An apparatus as claimed in claim 1, wherein the inner product P_δ

is based at least in part on a phase of the input signal or on a phase of a system output signal, or combinations thereof.

5. An apparatus for initializing a phase correction to be applied to a feedback signal, the feedback signal to be used in determining a deliberate predistortion for a signal processing system, the apparatus comprising:

means for initiating a coarse delay search;

means for selecting a time window of W samples of said feedback signal and an input signal with a predetermined sample delay increments of δ

between samples;

means for calculating an inner product P_δ

by performing a complex multiply and accumulate process for the W samples in the time window;

means for storing a maximum |P_δ

| found; and

means for incrementing δ

by a predetermined amount for subsequent time windows;

means for using factional sample increments for a fine delay search to cover a predetermined delay range, the delay range being centered on a maximum delay increment δ

_max found during a coarse delay search.

6. An apparatus as claimed in claim 5 wherein the inner product is defined by

$P_{\delta }$

= A MAC ·

∑

k = n ·

W n ·

W + W - 1 ⁢

exp ⁡

( j ·

( ∠

⁢

⁢

x δ

⁡

( k ) - ∠

⁢

⁢

z ⁡

( k ) ) )

where

∠

x_δ

(k) is a phase of said input signal

φ

z(k) is a phase of said feedback signal

A_MAC is a constant

n is an integer denoting a time window.

7. An apparatus as claimed in claim 5, wherein the phase correction comprises a phase of said maximum P_δ

.