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Semiconductor memory device and method of operating semiconductor memory device

  • US 7,327,631 B2
  • Filed: 01/13/2004
  • Issued: 02/05/2008
  • Est. Priority Date: 02/13/2003
  • Status: Expired due to Fees
First Claim
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1. A semiconductor memory device, comprising:

  • an oscillator circuit for generating an oscillation signal that varies based on a mode of operation;

    a word line enable circuit for generating a word line enable signal in response to the oscillation signal; and

    a control circuit for controlling the oscillator circuit and the word line enable circuit so that as the operation mode of the memory device changes from an active mode to a stand-by mode, a pulse width of the word line enable signal is widened, and a period of the oscillation signal is lengthened after a given time elapses from the beginning of the stand-by mode.

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