Methods and apparatus for distributing interrupts
First Claim
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1. A method for distributing interrupt load to processors in a multiprocessor system, the method comprising:
- identifying a first characteristic associated with a first interrupt, wherein the first characteristic indicates that the first interrupt corresponds to an operation performed with a first device;
identifying a second characteristic associated with a second interrupt, wherein the second characteristic indicates that the second interrupt corresponds to an operation performed with the first device;
selecting a first processor for handling the first interrupt and a second processor for handling the second interrupt, wherein different processors are selected for handling interrupts from the same device to distribute load for interrupts from the same device, wherein the first characteristic identifies a scheduling group of the first interrupt and the second characteristic identifies a scheduling group of the second interrupt, wherein the first processor is selected based on whether the first processor is handling an interrupt having a scheduling group that is different from a scheduling group of the first interrupt, and wherein the second processor is selected based on whether the second processor is handling an interrupt having a scheduling group that is different from a scheduling group of the second interrupt; and
wherein the first and second characteristics also identify a priority of the interrupt, an originating peripheral causing the interrupt, a type of a corresponding interrupt handler routine, the scheduling group, or whether the corresponding interrupt handler routine was recently run.
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Abstract
The present invention relates to handling interrupts in a multiprocessor system. An interrupt controller can receive input from a variety of interrupt sources, such as peripheral components and peripheral interfaces. Interrupts and their associated characteristics are identified. In one example, interrupt characteristics can be compared with characteristics of other interrupts handled by processors in the multiprocessor system. Interrupt characteristics are used to select a processor to run a routine for handling the associated interrupt. Intelligent selection provides efficient and effective distribution of interrupts.
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Citations
26 Claims
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1. A method for distributing interrupt load to processors in a multiprocessor system, the method comprising:
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identifying a first characteristic associated with a first interrupt, wherein the first characteristic indicates that the first interrupt corresponds to an operation performed with a first device; identifying a second characteristic associated with a second interrupt, wherein the second characteristic indicates that the second interrupt corresponds to an operation performed with the first device; selecting a first processor for handling the first interrupt and a second processor for handling the second interrupt, wherein different processors are selected for handling interrupts from the same device to distribute load for interrupts from the same device, wherein the first characteristic identifies a scheduling group of the first interrupt and the second characteristic identifies a scheduling group of the second interrupt, wherein the first processor is selected based on whether the first processor is handling an interrupt having a scheduling group that is different from a scheduling group of the first interrupt, and wherein the second processor is selected based on whether the second processor is handling an interrupt having a scheduling group that is different from a scheduling group of the second interrupt; and wherein the first and second characteristics also identify a priority of the interrupt, an originating peripheral causing the interrupt, a type of a corresponding interrupt handler routine, the scheduling group, or whether the corresponding interrupt handler routine was recently run. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. An apparatus for distributing interrupt load to processors in a multiprocessor system, the apparatus comprising:
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means for assigning a first characteristic to a first interrupt; means for assigning a second characteristic to a second interrupt; means for identifying the first characteristic associated with the first interrupt, wherein the first characteristic indicates that the first interrupt corresponds to an operation performed with a first device; means for identifying the second characteristic associated with the second interrupt, wherein the second characteristic indicates that the second interrupt corresponds to an operation performed with the first device; means for selecting a first processor for handling the first interrupt and a second processor for handling the second interrupt, wherein different processors are selected for handling interrupts from the same device to distribute load for interrupts from the same device, wherein the first characteristic identifies a scheduling group of the first interrupt and the second characteristic identifies a scheduling group of the second interrupt, wherein the first processor is selected based on whether the first processor is handling an interrupt having a scheduling group that is different from a scheduling group of the first interrupt, and wherein the second processor is selected based on whether the second processor is handling an interrupt having a scheduling group that is different from a scheduling group of the second interrupt; and wherein the first and second characteristics also identify a priority of the interrupt, an originating peripheral causing the interrupt, a type of a corresponding interrupt handler routine, the scheduling group, or whether the corresponding interrupt handler routine was recently run. - View Dependent Claims (11, 12, 13, 14, 15)
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16. A method for dynamic selection of a processor in a multiprocessor system, the method comprising:
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identifying a first interrupt from a communications adapter, the first interrupt including information identifying a communications session associated with the first interrupt; identifying a routine for handling the first interrupt; dispatching the first interrupt to a first processor upon checking a recent invocation indicator associated with the first processor to confirm that the first processor has a warm cache with respect to an interrupt handler corresponding to the first interrupt; identifying a second interrupt; and dispatching the second interrupt to the first processor if a first characteristic corresponding to the first interrupt and a second characteristic corresponding to the second interrupt are different and if the first and second interrupts are associated with different scheduling groups; wherein the first and second characteristics identify a priority of the interrupt, an originating peripheral causing the interrupt, a type of a corresponding interrupt handler routine, the scheduling group, or whether the corresponding interrupt handler routine was recently run. - View Dependent Claims (17, 18, 19, 20)
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21. An apparatus for dynamic selection of a processor in a multiprocessor system, the apparatus comprising:
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means for identifying a first interrupt from a communications adapter, the first interrupt including information identifying a separately addressable communications endpoint within the communications adapter; means for identifying a routine for handling the first interrupt; means for dispatching the first interrupt to a first processor upon checking a recent invocation indicator associated with the first processor to confirm that the first processor has a warm cache with respect to an interrupt handler corresponding to the first interrupt; means for identifying a second interrupt; means for dispatching the second interrupt to the first processor if a first interrupt characteristic and a second interrupt characteristic are different and if the first and second interrupts are associated with different scheduling groups; and wherein the first and second characteristics identify a priority of the interrupt, an originating peripheral causing the interrupt, a type of a corresponding interrupt handler routine, the scheduling group, or whether the corresponding interrupt handler routine was recently run. - View Dependent Claims (22, 23, 24, 25, 26)
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Specification