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Method of fabricating a semiconductor device having self-aligned floating gate and related device

  • US 7,329,580 B2
  • Filed: 06/20/2006
  • Issued: 02/12/2008
  • Est. Priority Date: 10/26/2005
  • Status: Active Grant
First Claim
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1. A method of fabricating a semiconductor device, comprising:

  • forming an isolation layer to define a fin body in a semiconductor substrate, the fin body including a first sidewall, a second sidewall opposite the first sidewall, a top surface, and a portion protruding above the isolation layer;

    forming a sacrificial pattern on the isolation layer, the sacrificial pattern including an opening self-aligned with the protruding portion of the fin body and exposing the protruding portion of the fin body;

    forming an insulated floating gate pattern to at least partially fill the opening;

    removing the sacrificial pattern;

    forming an inter-gate dielectric layer over the floating gate pattern;

    forming a control gate conductive layer over the inter-gate dielectric layer; and

    patterning the control gate conductive layer, the inter-gate dielectric layer, and the floating gate pattern to form a control gate electrode crossing the fin body and a floating gate electrode interposed between the control gate electrode and the fin body.

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