Breakpoint logic unit, debug logic and breakpoint method for a data processing apparatus

• US 7,334,161 B2
• Filed: 04/30/2004
• Issued: 02/19/2008
• Est. Priority Date: 04/30/2004
• Status: Active Grant

• Current Assignee: Arm Limited (SoftBank Group Corp.)
• Original Assignee: Arm Limited (SoftBank Group Corp.)
• Inventors: Rijk, Jon Andrew, Williams, Michael John, Kimelman, Paul
• Primary Examiner(s): Baderman; Scott
• Assistant Examiner(s): Contino; Paul F.
• Application Number:
  US10/835,279
• Publication Number:
  US 20050257089A1
• Time in Patent Office: 1,390 Days
• Field of Search: 714/34, 714/35
• US Class Current: 714/34
• CPC Class Codes: G06F 11/3648 using additional hardware

Abstract

The present invention provides a breakpoint logic unit, debug logic and breakpoint method for a data processing apparatus. The breakpoint logic unit comprises a value storage operable to store data indicative of a selected value for an operational characteristic of the data processing apparatus, and comparator logic operable to compare the selected value with a value of the operational characteristic as generated by the data processing apparatus. The comparator logic then generates at least one result signal indicative of a match between that value and the selected value. A control storage is also provided for storing a match control value, such that if the match control value has a first value the comparator logic is operable to set the at least one result signal if a match is detected between the value and the selected value, whilst if the match control value has a second value the comparator logic is operable to set the at least one result signal if a match is not detected between the value and the selected value. Breakpoint generation logic is then operable to enable generation of an associated at least one breakpoint signal if the at least one result signal is set. This has been found to provide a particularly flexible and efficient technique for enabling a variety of breakpoint conditions to be programmed within the breakpoint logic unit.

Claims

1. A breakpoint logic unit for a data processing apparatus, comprising:

a value storage configured to store data indicative of a selected value for an operational characteristic of the data processing apparatus;

comparator logic configured to compare said selected value with a value of said operational characteristic as generated by the data processing apparatus and to generate at least one result signal indicative of a match between said value and said selected value;

a control storage configured to store a match control value, if the match control value has a first value the comparator logic being operable to set the at least one result signal if a match is detected between said value and said selected value, while if the match control value has a second value the comparator logic being operable to set the at least one result signal if a match is not detected between said value and said selected value; and

breakpoint generation logic configured to enable generation of an associated at least one breakpoint signal if the at least one result signal is set;

wherein the at least one result signal comprises a single result signal, and the breakpoint generation logic is configured to enable generation of an associated single breakpoint signal if the result signal is set;

wherein said operational characteristic is an indication of an instruction fetch address, and wherein;

the instructions employed in the data processing apparatus are of variable width;

said control storage is configured to store a mask comprising a number of bits;

the comparator logic includes mask logic configured to receive a width control signal indicative of the width of the instruction the subject of the instruction fetch, and to select one or more bits of the mask dependent on the value of the width control signal and a predetermined number of least significant bits of the instruction fetch address generated by the data processing apparatus, the mask logic being further operable to generate a qualifier value derived from the selected one or more bits of the mask;

the remaining bits of said instruction address forming the value of the operational characteristic compared by the comparator logic with the selected value, and the comparator logic being further configured to generate an intermediate signal indicative of the comparison, the qualifier value being used to qualify the intermediate signal such that a match is only considered to occur if the qualifier value is set.

2. A breakpoint logic unit as claimed in claim 1, wherein the match control signal is a mismatch control signal, such that if the mismatch control signal is not set the comparator logic is operable to set the at least one result signal if a match is detected between said value and said selected value, while if the mismatch control signal is set the comparator logic is operable to set the at least one result signal if a match is not detected between said value and said selected value.

3. A breakpoint logic unit as claimed in claim 1, wherein, for each said result signal, the breakpoint generation logic is operable to generate the associated breakpoint signal if that result signal is set.

4. A breakpoint logic unit as claimed in claim 1, wherein said control storage is operable to store one or more further control values identifying one or more required conditions to be met in order for the at least one breakpoint signal to be generated, and the breakpoint logic unit further comprises:

breakpoint conditioning logic operable to receive control signals generated by the data processing apparatus and associated with the value of said operational characteristic and to determine based on the received control signals whether said one or more required conditions are met;

the breakpoint generation logic being operable, for each said result signal, to generate the associated breakpoint signal if both that result signal is set and said one or more required conditions are met.

5. A breakpoint logic unit as claimed in claim 4, wherein said one or more further control values comprise a mode control value indicating a required mode of operation from which the value of said operational characteristic was generated in order for the at least one breakpoint signal to be generated.

6. A breakpoint logic unit as claimed in claim 4, wherein said one or more further control values comprise a domain control value indicating a required domain from which the value of said operational characteristic was generated in order for the at least one breakpoint signal to be generated.

7. A breakpoint logic unit as claimed in claim 4, wherein said one or more further control values comprise an indication of one or more required processes from which the value of said operational characteristic was generated in order for the at least one breakpoint signal to be generated, the breakpoint conditioning logic being operable to receive one or more process match signals from one or more process identifier comparators indicative of whether the value of said operational characteristic was generated from one of said one or more required processes.

8. A breakpoint logic unit as claimed in claim 1, wherein the value storage comprises one or more registers.

9. A breakpoint logic unit as claimed in claim 1, wherein the control storage comprises one or more registers.

10. Debug logic for a data processing apparatus, comprising a plurality of breakpoint logic units as claimed in claim 1, the debug logic unit comprising combination logic configured to generate at least one breakpoint signal dependent on the breakpoint signals generated by each breakpoint logic unit.

11. Debug logic as claimed in claim 10, further comprising an additional breakpoint logic unit including:

a value storage configured to store data indicative of a selected value for an operational characteristic of the data processing apparatus;

comparator logic configured to compare said selected value with a value of said operational characteristic as generated by the data processing apparatus and to generate at least one result signal indicative of a match between said value and said selected value;

a control storage configured to store a match control value, if the match control value has a first value the comparator logic being operable to set the at least one result signal if a match is detected between said value and said selected value, while if the match control value has a second value the comparator logic being operable to set the at least one result signal if a match is not detected between said value and said selected value; and

breakpoint generation logic configured to enable generation of an associated at least one breakpoint signal if the at least one result signal is set;

wherein said operational characteristic is a process identifier indicating a process associated with an instruction fetch performed by the data processing apparatus, and wherein the at least one result signal comprises a single result signal, and the breakpoint generation logic is configured to enable generation of an associated single breakpoint signal if the result signal is set,

for the additional breakpoint logic unit, the at least one result signal comprising a single result signal, the control storage of said additional breakpoint logic unit including a link value, if the link value is sets the breakpoint signal associated with the single result signal being routed as an input to a first breakpoint logic unit of said plurality rather than being routed to the combination logic.

12. A method of enabling generation of a breakpoint signal in a data processing apparatus, comprising:

(a) storing data indicative of a selected value for an operational characteristic of the data processing apparatus;

(b) comparing within comparator logic said selected value with a value of said operational characteristic as generated by the data processing apparatus and generating at least one result signal indicative of a match between said value and said selected value;

(c) storing a match control value;

(d) if the match control value has a first value, setting the at least one result signal if a match is detected between said value and said selected value, while if the match control value has a second value setting the at least one result signal if a match is not detected between said value and said selected value; and

(e) enabling generation of an associated at least one breakpoint signal if the at least one result signal is set;

wherein the at least one result signal comprises a single result signal, and said step (e) enabling generation of an associated single breakpoint signal if the result signal is set;

wherein said operational characteristic is an indication of an instruction fetch address and wherein the instructions employed in the data processing apparatus are of variable width, and the method further comprising;

storing a mask comprising a number of bits;

employing mask logic within the comparator logic to receive a width control signal indicative of the width of the instruction the subject of the instruction fetch, and to select one or more bits of the mask dependent on the value of the width control signal and a predetermined number of least significant bits of the instruction fetch address generated by the data processing apparatus, the mask logic generating a qualifier value derived from the selected one or more bits of the mask;

at said step (b) using the remaining bits of said instruction address as the value of the operational characteristic compared with the selected value; and

generating an intermediate signal indicative of the comparison, the qualifier value being used to qualify the intermediate signal such that a match is only considered to occur if the qualifier value is set.

13. A method as claimed in claim 12, wherein the match control signal is a mismatch control signal, such that if the mismatch control signal is not set the at least one result signal is set at said step (d) if a match is detected between said value and said selected value, while if the mismatch control signal is set the at least one result signal is set at said step (d) if a match is not detected between said value and said selected value.

14. A method as claimed in claim 12, wherein, for each said result signal, the associated breakpoint signal is generated at said step (e) if that result signal is set.

15. A method as claimed in claim 12, further comprising:

storing one or more further control values identifying one or more required conditions to be met in order for the at least one breakpoint signal to be generated;

receiving at breakpoint conditioning logic control signals generated by the data processing apparatus and associated with the value of said operational characteristic and determining based on the received control signals whether said one or more required conditions are met;

for each said result signal, the associated breakpoint signal being generated at said step (e) if both that result signal is set and said one or more required conditions are met.

16. A method as claimed in claim 15, wherein said one or more further control values comprise a mode control value indicating a required mode of operation from which the value of said operational characteristic was generated in order for the at least one breakpoint signal to be generated.

17. A method as claimed in claim 15, wherein said one or more further control values comprise a domain control value indicating a required domain from which the value of said operational characteristic was generated in order for the at least one breakpoint signal to be generated.

18. A method as claimed in claim 15, wherein said one or more further control values comprise an indication of one or more required processes from which the value of said operational characteristic was generated in order for the at least one breakpoint signal to be generated, the breakpoint conditioning logic receiving one or more process match signals from one or more process identifier comparators indicative of whether the value of said operational characteristic was generated from one of said one or more required processes.

19. A method of facilitating debugging in a data processing apparatus, comprising:

providing a plurality of breakpoint logic units, each said breakpoint logic unit being operable to perform the method as claimed in claim 12; and

employing combination logic to generate at least one breakpoint signal dependent on the breakpoint signals generated by each breakpoint logic unit.

20. A method as claimed in claim 19, further comprising providing an additional breakpoint logic unit operable to perform the following method:

(a) storing data indicative of a selected value for an operational characteristic of the data processing apparatus;

(b) comparing within comparator logic said selected value with a value of said operational characteristic as generated by the data processing apparatus and generating at least one result signal indicative of a match between said value and said selected value;

(c) storing a match control value;

(d) if the match control value has a first value, setting the at least one result signal if a match is detected between said value and said selected value, while if the match control value has a second value setting the at least one result signal if a match is not detected between said value and said selected value; and

(e) enabling generation of an associated at least one breakpoint signal if the at least one result signal is set;

wherein said operational characteristic is a process identifier indicating a process associated with an instruction fetch performed by the data processing apparatus, and wherein the at least one result signal comprises a single result signal, and said step (e) enabling generation of an associated single breakpoint signal if the result signal is set,

for the additional breakpoint logic units the at least one result signal comprising a single result signal, said additional breakpoint logic unit having a link value associated therewith, if the link value is set, the breakpoint signal associated with the single result signal being routed as an input to a first breakpoint logic unit of said plurality rather than being routed to the combination logic.

21. A method of enabling generation of a breakpoint signal in a data processing apparatus, comprising:

(a) storing data indicative of a selected value for an operational characteristic of the data processing apparatus;

(b) comparing within comparator logic said selected value with a value of said operational characteristic as generated by the data processing apparatus and generating at least one result signal indicative of a match between said value and said selected value;

(c) storing a match control value;

(d) if the match control value has a first value, setting the at least one result signal if a match is detected between said value and said selected value, while if the match control value has a second value setting the at least one result signal if a match is not detected between said value and said selected value; and

(e) enabling generation of an associated at least one breakpoint signal if the at least one result signal is set;

wherein the at least one result signal comprises a plurality of result signals, and for each said result signal said step (e) enables generation of an associated breakpoint signal if that result signal is set;

wherein said operational characteristic is an indication of an instruction fetch address and wherein the instructions employed in the data processing apparatus are of variable length or width, and the method further comprising;

storing a mask comprising a number of bits;

at said step (b) generating an intermediate signal indicative of the comparison;

employing mask logic within the comparator logic to produce a plurality of output signals, each output signal being used in the generation of a corresponding result signal, each output signal being produced by qualifying the intermediate signal by an associated bit of the mask such that that output signal only indicates a match if the intermediate signal is set and the associated bit of the mask is set.

22. A method as claimed in claim 21, wherein the match control signal is a mismatch control signal, such that if the mismatch control signal is not set, the at least one result signal is set at said step (d) if a match is detected between said value and said selected value, while if the mismatch control signal is set, the at least one result signal is set at said step (d) if a match is not detected between said value and said selected value.

23. A method as claimed in claim 21, wherein, for each said result signal, the associated breakpoint signal is generated at said step (e) if that result signal is set.

24. A method as claimed in claim 21, further comprising:

storing one or more further control values identifying one or more required conditions to be met in order for the at least one breakpoint signal to be generated;

receiving at breakpoint conditioning logic control signals generated by the data processing apparatus and associated with the value of said operational characteristic and determining based on the received control signals whether said one or more required conditions are met;

for each said result signal, the associated breakpoint signal being generated at said step (e) if both that result signal is set and said one or more required conditions are met.

25. A method as claimed in claim 24, wherein said one or more further control values comprise a mode control value indicating a required mode of operation from which the value of said operational characteristic was generated in order for the at least one breakpoint signal to be generated.

26. A method as claimed in claim 24, wherein said one or more further control values comprise a domain control value indicating a required domain from which the value of said operational characteristic was generated in order for the at least one breakpoint signal to be generated.

27. A method as claimed in claim 24, wherein said one or more further control values comprise an indication of one or more required processes from which the value of said operational characteristic was generated in order for the at least one breakpoint signal to be generated, the breakpoint conditioning logic receiving one or more process match signals from one or more process identifier comparators indicative of whether the value of said operational characteristic was generated from one of said one or more required processes.

28. A breakpoint logic unit for a data processing apparatus, comprising:

a value storage operable to store data indicative of a selected value for an operational characteristic of the data processing apparatus;

comparator logic configured to compare said selected value with a value of said operational characteristic as generated by the data processing apparatus and to generate at least one result signal indicative of a match between said value and said selected value;

a control storage configured to store a match control value, if the match control value has a first value the comparator logic being operable to set the at least one result signal if a match is detected between said value and said selected value, while if the match control value has a second value the comparator logic being operable to set the at least one result signal if a match is not detected between said value and said selected value; and

breakpoint generation logic configured to enable generation of an associated at least one breakpoint signal if the at least one result signal is set;

wherein the at least one result signal comprises a plurality of result signals, and for each said result signal the breakpoint generation logic is configured to enable generation of an associated breakpoint signal if that result signal is set;

wherein said operational characteristic is an indication of an instruction fetch address, and wherein;

the instructions employed in the data processing apparatus are of variable length or width;

said control storage is configured to store a mask comprising a number of bits;

the comparator logic is further configured to generate an intermediate signal indicative of the comparison;

the comparator logic includes mask logic configured to produce a plurality of output signals, each output signal being used in the generation of a corresponding result signal, each output signal being produced by qualifying the intermediate signal by an associated bit of the mask such that that output signal only indicates a match if the intermediate signal is set and the associated bit of the mask is set.

29. A breakpoint logic unit as claimed in claim 28, wherein the match control signal is a mismatch control signal, such that if the mismatch control signal is not set the comparator logic is configured to set the at least one result signal if a match is detected between said value and said selected value, while if the mismatch control signal is set the comparator logic is configured to set the at least one result signal if a match is not detected between said value and said selected value.

30. A breakpoint logic unit as claimed in claim 28, wherein, for each said result signal, the breakpoint generation logic is configured to generate the associated breakpoint signal if that result signal is set.

31. A breakpoint logic unit as claimed in claim 28, wherein said control storage is configured to store one or more further control values identifying one or more required conditions to be met in order for the at least one breakpoint signal to be generated, and the breakpoint logic unit further comprising:

breakpoint conditioning logic configured to receive control signals generated by the data processing apparatus and associated with the value of said operational characteristic and to determine based on the received control signals whether said one or more required condition are met;

the breakpoint generation logic being configured, for each said result signal, to generate the associated breakpoint signal if both that result signal is set and said one or more required conditions are met.

32. A breakpoint logic unit as claimed in claim 31, wherein said one or more further control values comprise a mode control value indicating a required mode of operation from which the value of said operational characteristic was generated in order for the at least one breakpoint signal to be generated.

33. A breakpoint logic unit as claimed in claim 31, wherein said one or more further control values comprise a domain control value indicating a required domain from which the value of said operational characteristic was generated in order for the at least one breakpoint signal to be generated.

34. A breakpoint logic unit as claimed in claim 31, wherein said one or more further control values comprise an indication of one or more required processes from which the value of said operational characteristic was generated in order for the at least one breakpoint signal to be generated, the breakpoint conditioning logic being configured to receive one or more process match signals from one or more process identifier comparators indicative of whether the value of said operational characteristic was generated from one of said one or more required processes.