Frequency specific closed loop feedback control of integrated circuits

• US 7,336,090 B1
• Filed: 08/29/2006
• Issued: 02/26/2008
• Est. Priority Date: 04/16/2002
• Status: Expired due to Term

• Current Assignee: Meta Platforms, Inc. (f/k/a Facebook, Inc.)
• Original Assignee: Transmeta Corporation (Novafora, Inc.)
• Inventors: Koniaris, Kleanthes G., Burr, James B.
• Primary Examiner(s): HOLLINGTON, JERMELE M
• Application Number:
  US11/512,900
• Time in Patent Office: 546 Days
• Field of Search: None
• US Class Current: 324/750.3
• CPC Class Codes: G01R 31/3008 Quiescent current [IDDQ] test or leakage current test

Abstract

Systems and methods for frequency specific closed loop feedback control of integrated circuits. In one embodiment, a plurality of controllable inputs to an integrated circuit is adjusted to achieve a frequency specific predetermined value of a dynamic operating indicator of the integrated circuit at the desired specific operating frequency. The predetermined value is stored in a data structure within a computer usable media. The data structure comprises a plurality of frequency specific predetermined values for a variety of operating frequencies. An operating condition of an integrated circuit is controlled via closed loop feedback based on dynamic operating indicators of the measured behavior of the integrated circuit.

Claims

1. A method of operating a microprocessor comprising:

accessing a desired first operating frequency for said microprocessor;

measuring a dynamic operating indicator of said microprocessor;

adjusting a plurality of controllable inputs to said microprocessor in order for said dynamic operating indictor to approach a first predetermined value; and

operating said microprocessor at said desired first operating frequency and wherein said first predetermined value is obtained from a first record of a data structure and wherein said first record is specific to said first operating frequency.

2. A method as described in claim 1 further comprising:

accessing a desired second operating frequency for said microprocessor;

measuring said dynamic operating indicator of said microprocessor;

adjusting said plurality of controllable inputs to said microprocessor in order for said dynamic operating indictor to approach a second predetermined value; and

operating said microprocessor at said desired second operating frequency and wherein said second predetermined value is obtained from a second record of said data structure and wherein said second record is specific to said second operating frequency.

3. A method as described in claim 1 wherein said data structure comprises a plurality of records, each record being specific for a different operating frequency of said microprocessor.

4. A method as described in claim 3 wherein each record comprises a plurality of predetermined values all specific for an associated operating frequency of said microprocessor.

5. A method as described in claim 1 wherein said dynamic operating indicator is a count value established over time from a ring oscillator circuit.

6. A method as described in claim 5 wherein said dynamic operating indicator indicates a gate delay of said integrated circuit.

7. A method as described in claim 5 wherein said dynamic operating indicator indicates a gate leakage of said integrated circuit.

8. A method as described in claim 5 wherein said dynamic operating indicator indicates a behavior of one type of device selected from the set of NMOS devices and PMOS devices of said integrated circuit.

9. A method as described in claim 1 wherein said predetermined value is a function.

10. A microprocessor comprising:

a plurality of dynamic operating indicators for indicating operating conditions of said microprocessor;

a first computer usable media comprising a predetermined value for at least one of said plurality of dynamic operating indicators, wherein said predetermined value is frequency specific and corresponds to a desired operating frequency value;

a second computer usable media comprising computer usable instructions which when executed on said microprocessor implement a method comprising;

accessing said predetermined value from said first computer usable media;

obtaining a measured record of at least one dynamic operation indicator; and

adjusting said operating voltage to said microprocessor until said measured record is near said predetermined value for said at least one of said plurality of dynamic operating indicators.

11. A computer system as described in claim 10 wherein said first computer usable media comprises a plurality of records each comprising a predetermined value specific for a different operating frequency.

12. A microprocessor as described in claim 10 operable at a variety of voltages and frequencies.

13. A microprocessor as described in claim 10 operable to accept a variable voltage supply.

14. A microprocessor as described in claim 10 comprising a ring oscillator for measuring said at least one current dynamic operating indicator.

15. A computer system comprising:

a microprocessor comprising a plurality of dynamic operating indicators for indicating operating conditions of said microprocessor;

a variable voltage supply to provide an operating voltage to said microprocessor;

a first computer usable media coupled to said microprocessor and comprising a frequency specific predetermined value for at least one of said plurality of dynamic operating indicators;

a second computer usable media coupled to said microprocessor and comprising computer usable instructions which when executed on said microprocessor implement a method, said method comprising;

operating said microprocessor at a specific operating frequency;

accessing said predetermined value from said first computer usable media; and

adjusting said operating voltage to said microprocessor to achieve said predetermined value for said at least one of said plurality of dynamic operating indicators, wherein said at least one of said plurality of dynamic operating indicators is specific to said specific operating frequency.

16. A computer system as described in claim 15 wherein said first computer usable media comprises a plurality of records each comprising a predetermined value specific for a different operating frequency.

17. A system as described in claim 15 wherein said microprocessor comprises at least one of said plurality of dynamic operating indicators.

18. A computer usable memory comprising:

a first set of dynamic operating indicator values corresponding to a first desired power condition of a microprocessor operating at a first operating frequency; and

a second set of dynamic operating indicator values corresponding to a second desired power condition of a microprocessor operating at a second operating frequency.

19. A computer usable memory according to claim 18 wherein said first desired power condition is minimum power operation of said microprocessor at said first operating frequency.

20. A computer usable memory according to claim 19 wherein said second desired power condition is minimum power operation of said microprocessor at said second operating frequency.

21. A computer usable memory according to claim 18 wherein said first set of dynamic operating indicator values corresponds to a plurality of dynamic operating indicators in a microprocessor.

22. A computer usable memory according to claim 21 wherein at least one dynamic operating indicator value of said first set of dynamic operating indicator values corresponds to a dynamic operating indicator of said microprocessor that indicates a gate delay of said microprocessor.

23. A computer usable memory according to claim 21 wherein at least one dynamic operating indicator value of said first set of dynamic operating indicator values corresponds to a dynamic operating indicator of said microprocessor that indicates an off current of said microprocessor.

24. A computer usable memory according to claim 21 wherein at least one dynamic operating indicator value of said first set of dynamic operating indicator values corresponds to a dynamic operating indicator of said microprocessor that indicates a gate leakage of said microprocessor.

25. A computer usable memory according to claim 21 wherein at least one dynamic operating indicator value of said first set of dynamic operating indicator values corresponds to a dynamic operating indicator of said microprocessor that indicates a behavior of one type of device selected from the set of NMOS devices and PMOS devices of said microprocessor.

26. A system for operating an integrated circuit at a specific operating frequency, said system comprising:

circuitry for measuring a current dynamic operation indicator of said integrated circuit; and

a feedback loop coupled to said circuitry, said feedback loop for optimizing a function of a plurality of dynamic operating indicators of said integrated circuit toward a predetermined value of said function by controlling a plurality of controllable inputs to said integrated circuit, wherein said predetermined value is specific for said specific operating frequency.