Hierarchical, programmable-priority content addressable memory system
First Claim
Patent Images
1. A content addressable memory (CAM) system comprising:
- a first CAM device having a priority number output, a first enable input, a CAM core to output a local match address, and a cascade logic circuit to output the local match address from the first CAM device in response to assertion of a first enable signal at the first enable input;
a second CAM device having a priority number input and an enable output coupled to the priority number output and the first enable input, respectively, of the first CAM device, the second CAM device further having a priority number output and an enable input; and
a third CAM device having a priority number input and an enable output coupled to the priority number output and the enable input, respectively, of the second CAM device.
13 Assignments
0 Petitions
Accused Products
Abstract
A hierarchical programmable-priority content addressable memory (CAM) system including first, second and third CAM devices. The first CAM device has a first priority number output and a first enable input. The second CAM device has a priority number input and an enable output coupled to the priority number output and the first enable input, respectively, of the first CAM device. The second CAM device also has a priority number output and an enable input. The third CAM device has a priority number input and an enable output coupled to the priority number output and the enable input, respectively, of the second CAM device.
14 Citations
49 Claims
-
1. A content addressable memory (CAM) system comprising:
-
a first CAM device having a priority number output, a first enable input, a CAM core to output a local match address, and a cascade logic circuit to output the local match address from the first CAM device in response to assertion of a first enable signal at the first enable input; a second CAM device having a priority number input and an enable output coupled to the priority number output and the first enable input, respectively, of the first CAM device, the second CAM device further having a priority number output and an enable input; and a third CAM device having a priority number input and an enable output coupled to the priority number output and the enable input, respectively, of the second CAM device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
-
-
9. A content addressable memory (CAM) system comprising:
-
a first CAM device to output a first priority value; a second CAM device coupled to receive the first priority value from the first CAM device and configured to output, as a winning priority value, a highest priority one of the first priority value and a second priority value; and a third CAM device coupled to receive the winning priority value from the second CAM device and configured to output a first enable signal to the second CAM device if the winning priority value has a higher priority than a third priority value. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
-
-
21. A content addressable memory (CAM) device comprising:
-
a CAM core to output a local priority number; and a cascade logic circuit coupled to the CAM core to receive the local priority number and having an input to receive at least one remote priority number from another CAM device, the cascade logic circuit being configured to compare the local priority number and the at least one remote priority number at one of a plurality of different times selected in response to a control value that indicates a disposition the CAM device within a hierarchy of interconnected CAM devices. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28)
-
-
29. A content addressable memory (CAM) device comprising:
-
a CAM core to generate a local priority value and corresponding match address; and a cascade logic circuit coupled to receive the local priority value from the CAM core and having an input to receive a first enable signal from a first other CAM device, the cascade logic circuit being configured to compare the local priority value with a remote priority value received from a second other CAM device and to output a second enable signal to the second other CAM device if the remote priority value has a higher priority than the local priority value, the cascade logic circuit being further configured to enable the match address to be output from the CAM device if (1) the local priority value has a higher priority than the remote priority value and (2) the first enable signal is in a first state. - View Dependent Claims (30, 31, 32, 33)
-
-
34. A method of operation within a first content addressable memory (CAM) device, the method comprising:
-
generating a local priority value and corresponding match address; comparing the local priority value with a remote priority value received from a second CAM device; outputting an enable signal to the second CAM device if the remote priority value has a higher priority than the local priority value; and outputting the match address from the first CAM device if the local priority value has a higher priority than the remote priority value and an enable signal is received from a third CAM device. - View Dependent Claims (35, 36, 37, 38)
-
-
39. A method of operation within a content addressable memory (CAM) system, the method comprising:
-
outputting a first priority value from a first CAM device; comparing a second priority value with the first priority value within a second CAM device and outputting a highest priority one of the first and second priority values; and comparing a third priority value with the highest priority one of the first and second priority values within a third CAM device and, if the highest priority one of the first and second priority values has a higher priority than the third priority value, outputting a first enable signal from the third CAM device to the second CAM device. - View Dependent Claims (40, 41, 42, 43, 44, 45, 46, 47, 48)
-
-
49. A content addressable memory (CAM) device comprising:
-
means for generating a local priority value and corresponding match address; means for comparing the local priority value with a remote priority value received from a first other CAM device; means for outputting an enable signal to the first other CAM device if the remote priority value has a higher priority than the local priority value; and means for outputting the match address to an external signal path if the local priority value has a higher priority than the remote priority value and an enable signal is received from a second other CAM device.
-
Specification