Inverter bridge short-circuit protection scheme
First Claim
1. A three-phase multiple-level inverter bridge having three branches, each branch providing one phase of the three-phase output for driving an inductive load, the multiple-level inverter bridge having “
- L”
bus voltage levels (L≧
3), wherein two of the L levels are a most-negative bus voltage and a most-positive bus voltage, any intermediate bus voltage levels being differentiated from other bus voltage levels by a difference of the most-positive bus voltage and the most-negative bus voltage, divided by (L−
1),each branch comprising two half-branches, a first one-half branch comprising (L−
1) switches connected in series between the most-positive bus voltage and the phase output, and a second one-half branch comprising (L−
1) switches connected in series between the most-negative bus voltage and the phase output,each half branch comprising;
an outermost switch of the (L−
1) switches which is the switch connected to the most-positive bus voltage or the most-negative bus voltage;
an innermost switch of the (L−
1) switches which is the switch connected to the phase output; and
if L>
3, (L−
3) intermediate switches of the (L−
1) switches connected in series between the innermost switch and the outermost switch,wherein;
each of the (L−
1) switches has a transconductance, and is configured to be driven by a control signal, andeach outermost switch has a lower transconductance than a transconductance of the innermost switch of the same half branch, andif L>
3, each intermediate switch of a half branch has a transconductance that is no greater than that of an inner next switch in the series, connected toward the phase output, and is no less than that of an outer next switch in the series, connected toward the most-negative bus voltage or the most-positive bus voltage.
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Accused Products
Abstract
A fault handling system for short circuit recovery in three-phase multiple-level inverter bridges, used to drive inductive loads, to assure a proper sequence for turning-off switches in the inverter bridge. Switches are selected for use in the inverter bridge so that outer switches toward the most positive and most negative bus voltage levels of the inverter bridge have lower transconductances than inner switches closest to an output phase of the inverter bridge. Additionally, driver cards driving outer switches utilize lower magnitude excitation control signals than driver cards driving inner switches. Driver cards driving outer switches, when detecting desaturation of an on-state switch, are set to automatically command the outer switch to an off-state, whereas driver cards driving inner switches wait for instructions from a controller before taking action.
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Citations
22 Claims
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1. A three-phase multiple-level inverter bridge having three branches, each branch providing one phase of the three-phase output for driving an inductive load, the multiple-level inverter bridge having “
- L”
bus voltage levels (L≧
3), wherein two of the L levels are a most-negative bus voltage and a most-positive bus voltage, any intermediate bus voltage levels being differentiated from other bus voltage levels by a difference of the most-positive bus voltage and the most-negative bus voltage, divided by (L−
1),each branch comprising two half-branches, a first one-half branch comprising (L−
1) switches connected in series between the most-positive bus voltage and the phase output, and a second one-half branch comprising (L−
1) switches connected in series between the most-negative bus voltage and the phase output,each half branch comprising; an outermost switch of the (L−
1) switches which is the switch connected to the most-positive bus voltage or the most-negative bus voltage;an innermost switch of the (L−
1) switches which is the switch connected to the phase output; andif L>
3, (L−
3) intermediate switches of the (L−
1) switches connected in series between the innermost switch and the outermost switch,wherein; each of the (L−
1) switches has a transconductance, and is configured to be driven by a control signal, andeach outermost switch has a lower transconductance than a transconductance of the innermost switch of the same half branch, and if L>
3, each intermediate switch of a half branch has a transconductance that is no greater than that of an inner next switch in the series, connected toward the phase output, and is no less than that of an outer next switch in the series, connected toward the most-negative bus voltage or the most-positive bus voltage. - View Dependent Claims (2, 3)
- L”
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4. A method of preparing switches for a three-phase multiple-level inverter bridge having three branches, each branch providing one phase of the three-phase output for driving an inductive load, the multiple-level inverter bridge having “
- L”
bus voltage levels (L≧
3), wherein two of the L levels are a most-negative bus voltage and a most-positive bus voltage, any intermediate bus voltage levels being differentiated from other bus voltage levels by a difference of the most-positive bus voltage and the most-negative bus voltage, divided by (L−
1),each branch comprising two half-branches, a first one-half branch comprising (L−
1) switches connected in series between the most-positive bus voltage and the phase output, and a second one-half branch comprising (L−
1) switches connected in series between the most-negative bus voltage and the phase output,each half branch having an outermost switch of the (L−
1) switches which is the switch connected to the most-positive bus voltage or the most-negative bus voltage, each half branch having an innermost switch of the (L−
1) switches which is the switch connected to the phase output,each of the (L−
1) switches having a transconductance, and configured to be driven by a control signal, andeach outermost switch having a lower transconductance than a transconductance of the innermost switch of the same half branch, wherein if L>
3, there are (L−
3) intermediate switches of the (L−
1) switches connected in series between the innermost switch and the outermost switch, each intermediate switch of a half branch having a transconductance that is no greater than that of a inner next switch in the series, connected toward the phase output, and is no less than that of an outer next switch in the series, connected toward the most-negative bus voltage or the most-positive bus voltage,the method comprising; determining the transconductance of at least 6(L−
1) switches;selecting, for each half branch, an outer switch and an inner switch, so that said outer switch has a lower transconductance than said inner switch; and selecting, if L>
3, for each half branch, each intermediate switch so that a transconductance of the respective intermediate switch is no greater than that of an inner next switch to be connected toward the phase output, and is no less than that of an outer next switch to be connected toward the most-negative bus voltage or the most-positive bus voltage. - View Dependent Claims (5, 6, 7, 8, 9, 10)
- L”
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11. A system comprising:
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a three-phase multiple-level inverter bridge having three branches, each branch providing one phase of the three-phase output for driving an inductive load, the multiple-level inverter bridge having “
L”
bus voltage levels (L≧
3), wherein two of the L levels are a most-negative bus voltage and a most-positive bus voltage, any intermediate bus voltage levels being differentiated from other bus voltage levels by a difference of the most-positive bus voltage and the most-negative bus voltage, divided by (L−
1),each branch comprising two half-branches, a first one-half branch comprising (L−
1) switches connected in series between the most-positive bus voltage and the phase output, and a second one-half branch comprising (L−
1) switches connected in series between the most-negative bus voltage and the phase output,each half branch having an outermost switch of the (L−
1) switches which is the switch connected to the most-positive bus voltage or the most-negative bus voltage,each half branch having an innermost switch of the (L−
1) switches which is the switch connected to the phase output,wherein if L>
3, there are (L−
3) intermediate switches of the (L−
1) switches connected in series between the innermost switch and the outermost switch, anda plurality of driving circuits configured to drive switches of the inverter bridge, each of the inverter bridge switches having its own driving circuit, and each driving circuit providing an excitation control signal driving the respective switch to an on-state or an off-state, wherein each outermost switch of each half branch is driven to an on-state by a lower-magnitude excitation control signal, than a magnitude of an excitation control signal used to drive an innermost switch of the same half branch to an on-state, wherein, if L>
3, each intermediate switch of a half branch is driven to an on-state by an excitation control signal that is no greater in magnitude than that of an excitation control signal used to drive an inner next switch connected toward the phase output to an on-state, and is no less than that of an excitation control signal used to drive an outer next switch connected toward the most-negative bus voltage or the most-positive bus voltage to an on-state. - View Dependent Claims (12, 13, 14, 15, 16)
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17. A system comprising:
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a three-phase multiple-level inverter bridge having three branches, each branch providing one phase of the three-phase output for driving an inductive load, the multiple-level inverter bridge having “
L”
bus voltage levels (L≧
3), wherein two of the L levels are a most-negative bus voltage and a most-positive bus voltage, any intermediate bus voltage levels being differentiated from other bus voltage levels by a difference of the most-positive bus voltage and the most-negative bus voltage, divided by (L−
1),each branch comprising two half-branches, a first one-half branch comprising (L−
1) switches connected in series between the most-positive bus voltage and the phase output, and a second one-half branch comprising (L−
1) switches connected in series between the most-negative bus voltage and the phase output,each half branch having an outermost switch of the (L−
1) switches which is the switch connected to the most-positive bus voltage or the most-negative bus voltage,each half branch having an innermost switch of the (L−
1) switches which is the switch connected to the phase output, andif L>
3, each half branch having (L−
3) intermediate switches of the (L−
1) switches connected in series between the innermost switch and the outermost switch; anda plurality of driving circuits configured to drive switches of the inverter bridge, each of the inverter bridge switches having its own driving circuit, and each driving circuit providing an excitation control signal driving the respective switch to an on-state or an off-state; a plurality of monitoring circuits, each of the inverter bridge switches having its own monitoring circuit monitoring either a voltage across a respective switch in an on-state or a current through a respective switch in an on-state; a plurality of overload condition detecting circuits, each of the inverter bridge switches having its own overload condition detecting circuit, detecting an overload condition by comparing the monitored voltage or current of the respective switch in the on-state with a threshold level; a three-phase multiple-level inverter controller, commanding each driving circuit when to output an excitation control signal to drive a respective switch an on-state or an off-state; wherein each driving circuit providing the excitation control signal to a respective outermost switch, upon detection of an overload condition of the respective outermost switch, automatically drives the respective outermost switch to an off-state, and the overload detecting circuit of the respective outermost switch signals to said three-phase multiple-level inverter controller that the overload condition has been detected, wherein each overload detecting circuit of a respective innermost switch, upon detection of an overload condition of the respective innermost switch, signals to said three-phase multiple-level inverter controller that the overload condition has been detected, and the driving circuit providing the excitation control signal to the respective innermost switch waits for instructions from said three-phase multiple-level inverter controller as to whether to leave the innermost switch in an on-state or to drive the innermost switch to an off-state. - View Dependent Claims (18, 19, 20, 21, 22)
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Specification