Time stamping events for fractions of a clock cycle
First Claim
Patent Images
1. A time stamping circuit, comprising:
- two or more detection circuits arranged to receive an event-in signal and to generate an event signal based on a phase of a clock cycle at which the event-in signal is detected; and
a decoder in electrical communication with the two or more detection circuits, the decoder outputs an event-out signal and at least one bit representing the phase of the clock cycle at which the event-in signal was detected, wherein the at least one bit is based on the event signals received from the two or more detection circuits.
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Abstract
Generally, the embodiments are directed to circuits and methods for time stamping an event at a fraction of a clock cycle. A time stamping circuit comprises two or more detection circuits. The detection circuits receive an event-in signal and generate event signals based on a clock phase at which the event-in signal was received. A decoder receives the event signals and outputs an event-out signal and a time stamp that represents the phase at which the event-in signal was detected. By time stamping the event-in signal to a phase division, the time stamping circuit detects event signals that occur at a rate faster than the clock cycle.
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Citations
25 Claims
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1. A time stamping circuit, comprising:
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two or more detection circuits arranged to receive an event-in signal and to generate an event signal based on a phase of a clock cycle at which the event-in signal is detected; and a decoder in electrical communication with the two or more detection circuits, the decoder outputs an event-out signal and at least one bit representing the phase of the clock cycle at which the event-in signal was detected, wherein the at least one bit is based on the event signals received from the two or more detection circuits. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A time stamping circuit, comprising:
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a detection circuit including two or more detection elements, each detection element arranged to receive an event-in signal and output an event signal based on a phase of a clock cycle at which the event-in signal is received; and a decoder in electrical communication with each detection element, the decoder outputs an event-out signal and at least one bit representing the phase at which the event-in signal is detected, wherein the one bit is based on the event signals received from the detection elements. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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22. A method for time stamping an event signal, comprising:
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receiving an event-in signal; detecting a phase of a clock cycle during which the event-in signal was received; and outputting an event-out signal and at least one bit representing the phase at which the event-in signal was detected. - View Dependent Claims (23, 24, 25)
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Specification