Light emitting device processes

• US 7,341,880 B2
• Filed: 07/22/2004
• Issued: 03/11/2008
• Est. Priority Date: 09/17/2003
• Status: Active Grant

• Current Assignee: Formosa Epitaxy Incorporated (Epistar Corporation)
• Original Assignee: Luminus Devices Incorporated (Sanan Optoelectronics Company Limited)
• Inventors: Graff, John, Duncan, Scott, Minsky, Milan, Lim, Michael, Erchak, Alexei A., Weig, Matthew
• Primary Examiner(s): Whitehead, Jr.; Carl
• Assistant Examiner(s): Dolan; Jennifer M.
• Application Number:
  US10/896,435
• Publication Number:
  US 20050059178A1
• Time in Patent Office: 1,328 Days
• Field of Search: 257/E33.067, 257/E33.068, 438/26, 438/39
• US Class Current: 438/26
• CPC Class Codes: H01L 2224/49111 the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 27/156 two-dimensional arrays
• CPC Class Codes: H01L 2933/0083 Periodic patterns for optical field-shaping in or on the semiconductor body or semiconductor body package, e.g. photonic bandgap structures
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H04N 9/315 Modulator illumination systems general applications of lighting devices F21V; general optical systems G02B; lamp houses for projectors not peculiar to the presence of an electronic spatial light modulator G03B21/20

Abstract

Light-emitting devices, and related components, processes, systems and methods are disclosed.

Claims

1. A method comprising:

providing a submount connected to a substrate via a plurality of mesas including a semiconductor layer, at least some of the mesas including a quantum well containing region;

at least partially decomposing portions of the semiconductor layer on a mesa by mesa basis;

separating the substrate from at least one of the mesas to expose an upper surface of at least one of the mesas; and

processing the upper surface of at least one of the mesas by, at least, patterning the upper surface of at least one of the mesas.

2. The method of claim 1, wherein providing the submount attached to the substrate includes:

providing a substrate including a semiconductor layer and a plurality of device layers;

etching the device layers to form a plurality of mesas; and

bonding the substrate to a submount.

3. The method of claim 1, wherein at least partially decomposing the semiconductor layer includes sequentially exposing the semiconductor layer of each of the plurality of mesas to electromagnetic radiation.

4. The method of claim 3, wherein exposing the semiconductor layer of each of the plurality of mesas to electromagnetic radiation includes determining a beam size of the electromagnetic radiation.

5. The method of claim 4, wherein determining a beam size includes matching the beam size to a size of a particular one of the mesas.

6. The method of claim 4, wherein determining a beam size includes matching the beam shape to a shape of a particular one of the mesas.

7. The method of claim 3, further comprising, before exposing the substrate to the electromagnetic radiation, passing the electromagnetic radiation through a mask.

8. The method of claim 1, wherein the portions of the substrate are sequentially at least partially decomposed on a mesa-by-mesa basis.

9. The method of claim 1, wherein the portions of the substrate are at least partially decomposed on a mesa-by-mesa basis.

10. The method of claim 1, further comprising:

forming a light emitting device from the at least one of the mesas.

11. The method of claim 1, wherein patterning a surface of at least one of the mesas includes:

depositing a resist material on at least some of the plurality of mesas; and

imprinting the resist material using a mold.

12. The method of claim 11, wherein the mold is a flexible mold.

13. The method of claim 1, wherein patterning a surface of at least one of the mesas includes:

forming an array of self-assembled nano-particles on the surface of at least some of the mesas.

14. The method of claim 13, wherein the self-assembled nano-particles include polystyrene beads.

15. The method of claim 14, further comprising:

depositing a material onto the mesas and the nano-particles; and

removing the nano-particles and portions of the material supported by the nano-particles.

16. The method of claim 1, comprising separating the substrate from a plurality of the mesas and patterning the upper surfaces of a plurality of the mesas.

17. The method of claim 1, wherein processing the upper surface of at least one of the mesas includes removing residue from the upper surface prior to patterning the upper surface of at least one of the mesas.

18. The method of claim 1, wherein patterning the upper surface of at least one of the mesas comprises forming a plurality of holes in the upper surface.

19. The method of claim 1, wherein patterning the upper surface of at least one of the mesas enhances light extraction through the upper surface.