Cross-fill pattern for metal fill levels, power supply filtering, and analog circuit shielding

• US 7,342,316 B2
• Filed: 01/26/2006
• Issued: 03/11/2008
• Est. Priority Date: 01/30/2004
• Status: Active Grant

• Current Assignee: Bell Semiconductor, LLC (Hilco Inc. (d/b/a Hilco Global))
• Original Assignee: Agere Systems Incorporated (Broadcom, Inc.)
• Inventors: Dazzo, Donald Jr., Booth, Richard
• Primary Examiner(s): Lee; Calvin
• Application Number:
  US11/339,540
• Publication Number:
  US 20060124972A1
• Time in Patent Office: 775 Days
• Field of Search: 257773-775, 257/E21.597, 438/618, 438/666, 438/669
• US Class Current: 257/773
• CPC Class Codes: H01L 23/5223 Capacitor integral with wiring layers
• CPC Class Codes: H01L 23/5225 Shielding layers formed together with wiring layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A cross-fill metal fill pattern technique is provided such that portions of a metal fill pattern are patterned to accomplish a secondary function. For instance, in the exemplary embodiments, ever other trace or line of interdigitated fingers is routed to a ground, while the interceding traces or lines of interdigitated fingers are routed to a power supply. In this way, a capacitor function is formed across the power supply, providing additional decoupling for the power supply. Moreover, a suitably tight cross-fill metal fill pattern (i.e., higher density of metal) provides an electrical shielding function for electromagnetic radiation passing therethrough.

Claims

1. An integrated circuit including a metal fill pattern comprising:

a first plurality of curved metal traces electrically connected to a power supply pad;

a second plurality of curved metal traces electrically connected to a ground pad; and

over-routing signal bearing metal lines over said first plurality of metal traces and said second plurality of metal traces;

wherein said second plurality of metal traces are interdigitated between said first plurality of metal traces to form a purposeful inter-metal capacitance therebetween and to provide electromagnetic shielding to protect circuitry therebelow from said over-routed signal bearing metal lines.

2. The integrated circuit including a metal fill pattern according to claim 1, wherein:

said circuitry therebelow includes an analog circuit.

3. The integrated circuit including a metal fill pattern according to claim 1, further comprising:

a first plurality of traces crossing each of said first plurality of metal traces; and

a second plurality of traces crossing each of said second plurality of metal traces.

4. The integrated circuit including a metal fill pattern according to claim 3, wherein:

said first plurality of traces each form a perpendicular angle with respect to an electrically connected one of said first plurality of metal traces.

5. The integrated circuit including a metal fill pattern according to claim 4, wherein:

said second plurality of traces each form a perpendicular angle with respect to an electrically connected one of said second plurality of metal traces.

6. The integrated circuit including a metal fill pattern according to claim 4, wherein:

a portion of said first plurality of metal traces connected to a number of said first plurality of traces forms a straight line.

7. The integrated circuit including a metal fill pattern according to claim 6, wherein:

another portion of said first plurality of metal traces connected to others of said first plurality of traces forms a curving line.

8. The integrated circuit including a metal fill pattern according to claim 4, wherein:

a portion of said first plurality of metal traces connected to a number of said first plurality of traces forms a curving line.

9. The integrated circuit including a metal fill pattern according to claim 1, wherein:

said metal fill pattern forms a coverage density of at least 50%.

10. The integrated circuit including a metal fill pattern according to claim 1, wherein:

said first plurality of metal traces and said second plurality of metal traces are linear.

11. The integrated circuit including a metal fill pattern according to claim 10, wherein:

said first plurality of metal traces and said second plurality of metal traces run along a generally straight line.

12. An integrated circuit including a metal fill pattern comprising:

a first plurality of various length metal traces electrically connected to a power supply pad;

a second plurality of various length metal traces electrically connected to a ground pad; and

over-routing signal bearing metal lines over said first plurality of metal traces and said second plurality of metal traces;

wherein said second plurality of metal traces are interdigitated between said first plurality of metal traces to form a purposeful inter-metal capacitance therebetween and to provide electromagnetic shielding to protect circuitry therebelow from said over-routed signal bearing metal lines.

13. The integrated circuit including a metal fill pattern according to claim 12, wherein:

said circuitry therebelow includes an analog circuit.

14. The integrated circuit including a metal fill pattern according to claim 12, further comprising:

a first plurality of traces crossing each of said first plurality of metal traces; and

a second plurality of traces crossing each of said second plurality of metal traces.

15. The integrated circuit including a metal fill pattern according to claim 14, wherein:

said first plurality of traces each form a perpendicular angle with respect to an electrically connected one of said first plurality of metal traces.

16. The integrated circuit including a metal fill pattern according to claim 15, wherein:

said second plurality of traces each form a perpendicular angle with respect to an electrically connected one of said second plurality of metal traces.

17. The integrated circuit including a metal fill pattern according to claim 15, wherein:

a portion of said first plurality of metal traces connected to a number of said first plurality of traces forms a straight line.

18. The integrated circuit including a metal fill pattern according to claim 17, wherein:

another portion of said first plurality of metal traces connected to others of said first plurality of traces forms a curving line.

19. The integrated circuit including a metal fill pattern according to claim 15, wherein:

a portion of said first plurality of metal traces connected to a number of said first plurality of traces forms a curving line.

20. The integrated circuit including a metal fill pattern according to claim 12, wherein:

said metal fill pattern forms a coverage density of at least 50%.

21. The integrated circuit including a metal fill pattern according to claim 20, wherein:

said first plurality of metal traces and said second plurality of linear metal traces run along a generally straight line.

22. The integrated circuit including a metal fill pattern according to claim 12, wherein:

said first plurality of metal traces and said second plurality of metal traces are linear.