Semiconductor test device using leakage current and compensation system of leakage current

• US 7,342,408 B2
• Filed: 08/28/2006
• Issued: 03/11/2008
• Est. Priority Date: 08/04/2003
• Status: Expired due to Fees

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kim, Kwang-Il
• Primary Examiner(s): Nguyen; Vinh P.
• Application Number:
  US11/510,621
• Publication Number:
  US 20070018679A1
• Time in Patent Office: 561 Days
• Field of Search: 324760-769, 324/158.1, 438 14- 18, 714/724, 714/733
• US Class Current: 324/762.08
• CPC Class Codes: G01R 31/2621 for testing field effect transistors, i.e. FET's
• CPC Class Codes: G01R 31/27 Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects surrounding elements testing printed circuit boards G01R31/2801
• CPC Class Codes: H01L 22/34 Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line switching, multiplexing, gating devices G01R19/25; process control with lithography, e.g. dose control, G03F7/20; structures for alignment control by optical means G03F7/70633

Abstract

The present invention relates to a semiconductor test device which may use a leakage current and/or a compensation system of leakage current. The semiconductor test device, according to exemplary embodiments of the present invention, may include MOS transistors which may be fabricated in processes similar to those of the semiconductor device. The semiconductor test device may sense the leakage currents which may flow in the MOS transistors, may test whether the semiconductor device may be fabricated normally or abnormally, and may generate at least a normal or abnormal signal as a result. The leakage current compensation device may compensate for the leakage current which may flow in the semiconductor device in response to the normal or abnormal signal of the semiconductor test device. According to exemplary embodiments of the present invention, abnormally-fabricated MOS transistors may be tested and malfunctions of the semiconductor device may be reduced by the leakage current compensation device.

Claims

1. A compensation system comprising:

a semiconductor test device including first and second MOS transistors and a comparator, the first and second MOS transistors being fabricated in the same process as MOS transistors of a semiconductor device, and the comparator being configured to compare first and second leakage currents flowing in the first and second MOS transistors to test whether the MOS transistors of the semiconductor device are fabricated normally; and

a leakage current compensation device configured to compensate for leakage current flowing in the MOS transistors of the semiconductor device in response to an output signal from the semiconductor test device.

2. The system of claim 1, wherein

the first MOS transistor flows a first leakage current through a channel having a critical channel length or a first leakage current through an oxide layer having a channel length smaller than the critical channel length, in an off-mode,

the second MOS transistor flows a second leakage current through a channel having a critical channel length larger than the critical channel length or a second leakage current through a channel having a thickness smaller than a second channel length, in an off-mode, and

the comparator compares the first leakage current with second leakage current to determine whether the semiconductor device is fabricated normally,

wherein the first MOS transistor has a first channel width such that the first leakage current is less than the second leakage current when the MOS transistors are fabricated normally, and the first leakage current is less than the second leakage current if the MOS transistors are fabricated abnormally, and

wherein the second MOS transistor has a second channel width such that the second leakage current is greater than the first leakage current when the MOS transistors are fabricated normally, and the second leakage current is less then the first leakage current when the MOS transistors are fabricated abnormally.

3. The system of claim 1, wherein the compensation system of leakage current provides a leakage current for the MOS transistors in response to an abnormal signal of the semiconductor test device in case that the semiconductor device is fabricated abnormally to cause leakage current in the MOS transistors.

4. A compensation system comprising:

a semiconductor test device including first and second leakage current sources and a comparator, the first and second leakage current sources being fabricated in the same process as at least one potential leakage current sources of a semiconductor device, and the comparator being configured to compare first and second leakage currents flowing in the first and second leakage current sources to test whether the at least one potential leakage current source is fabricated normally; and

a leakage current compensation device configured to compensate for leakage current flowing in the at least one potential leakage current source in response to an output signal from the semiconductor test device.

5. The system of claim 4, wherein

the first leakage current source includes a first MOS capacitor flowing a first leakage current through an oxide layer having a thickness less than or equal to a critical thickness,

the second leakage current source includes a second MOS capacitor flowing a second leakage current through an oxide layer having a thickness greater than the critical thickness, but less than a second thickness, and

the comparator compares the first leakage current with the second leakage current to determine whether the semiconductor device is fabricated normally, wherein

the first MOS capacitor and the second MOS capacitor have gate areas A1 and A2, respectively, such that the first leakage current is less than the second leakage current when the MOS transistors are fabricated normally, and the first leakage current is greater than the second leakage current when the MOS transistors are fabricated abnormally.

6. The compensation system of claim 4, wherein if the comparator determines that the first leakage current is smaller than the second leakage current, the at least one potential leakage current source is fabricated normally, and if the first leakage current is larger than the second leakage current, the at least one potential leakage current source is fabricated abnormally.

7. The compensation system of claim 4, wherein the first and second leakage current sources each include at least one transistor.

8. The compensation system of claim 7, wherein the first and second transistors are NMOS transistors.

9. The compensation system of claim 7, wherein the first and second transistors are PMOS transistors.

10. The compensation system of claim 4, wherein the first leakage current source is a first transistor designed for flowing a first leakage current through a channel having a critical channel length or a first leakage current through a channel having a channel length shorter than the critical channel length, in an off-mode,

the second leakage current source is a second transistor designed for flowing a second leakage current through a channel having a channel length longer than the critical channel length or a second leakage current through a channel having a channel length shorter than a second channel length, in an off-mode,

the first transistor has a channel width W1 such that the first leakage current is less than the second leakage current when the at least one potential leakage current source is fabricated normally, and the first leakage current is less than the second leakage current if the at least one potential leakage current source is fabricated abnormally, and

the second transistor has a channel width W2 such that the second leakage current is greater than the first leakage current when the at least one potential leakage current source is fabricated normally, and the second leakage current is less then the first leakage current when the at least one potential leakage current source is fabricated abnormally.

11. The compensation system of claim 10, wherein the comparator generates a normal signal when the second leakage current is greater than the first leakage current, and an abnormal signal when the first leakage current is greater than the second leakage current.

12. The compensation system of claim 4, wherein

the first leakage current source is a first capacitor flowing a first leakage current through an oxide layer having a thickness less than or equal to a critical thickness,

the second leakage current source is a second capacitor flowing a second leakage current through an oxide layer having a thickness greater than the critical thickness, but less than a second thickness, and wherein

the first capacitor and the second capacitor have gate areas A1 and A2, respectively, such that the first leakage current is less than the second leakage current when the at least one potential leakage current source is fabricated normally, and the first leakage current is greater than the second leakage current when the at least one potential leakage current source is fabricated abnormally.

13. The compensation system of claim 12, wherein the comparator generates a normal signal when the second leakage current is greater than the first leakage current, and an abnormal signal when the second leakage current is less than the first leakage current.