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Method for reduced N+ diffusion in strained Si on SiGe substrate

  • US 7,345,329 B2
  • Filed: 02/15/2005
  • Issued: 03/18/2008
  • Est. Priority Date: 09/09/2003
  • Status: Expired due to Fees
First Claim
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1. A semiconductor device comprising:

  • a relaxed SiGe-based substrate;

    a tensile biaxially strained Si cap layer formed on the relaxed SiGe-based substrate;

    a gate electrode formed on the relaxed SiGe-based substrate with a gate oxide formed on the Si cap layer;

    source and drain extension regions formed in an upper surface of the SiGe substrate and containing an N type impurity; and

    a low vacancy region that overlap the source and drain extension regions and containing an interstitial element or a vacancy-trapping element,wherein an implant profile of the interstitial element or the vacancy-trapping element fully contains an N type impurity profile, whereby diffusion retardation is maximized.

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